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Merged
merged 24 commits into from
May 31, 2023

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@sys-ce-bb sys-ce-bb commented May 31, 2023

Merged from sycl.

Reverted fd45980 because it depends on 712cb4e.

maksimsab and others added 23 commits May 28, 2023 13:01
clang-offload-bundler functionality was taken out from tool into
"library" here: https://reviews.llvm.org/D129873.
This commit adjusts CODEOWNERS file so that DPC++ tools team could track
changes.
Signed-off-by: Michael Aziz <michael.aziz@intel.com>
The existing implementation of host-side abs_diff relies on undefined
behavior when the signed operations overflow. This can mean that using
different compilers to build DPC++ may break the implementation. This
commit changes the implementation to avoid this undefined behavior.

---------

Signed-off-by: Larsen, Steffen <steffen.larsen@intel.com>
Co-authored-by: Dmitry Vodopyanov <dmitry.vodopyanov@intel.com>
Signed-off-by: Michael Aziz <michael.aziz@intel.com>
…l#9572)

AOCO specific objects can be added to an archive.  When this occurs,
the archive was being completely ignored, causing issues with device
compilation.  Take advantage of the additional `-excluded-targets` option
from the `clang-offload-bundler` so we can process these archives for
the needed device information, excluding potential unbundling of the
target device in the presence of `aoco` binaries in that same object.

---------

Co-authored-by: Michael Toguchi <michael.d.toguchi@intel.com>
This small patch fixes the TK size for tf32 type.
…intel#9624)

Using (cu|hip)DeviceGetPCIBusId API call, present since at least CUDA
8.0 / ROCm 2.8.

Unlike L0, we do not require setting `SYCL_ENABLE_PCI=1` environment
variable.
…9606)

sycl_devices is used instead now, including our public and internal CI.
Adds prefetch and joint_prefetch functions for providing prefetch hints
associated with specific levels of cache.

---------

Signed-off-by: John Pennycook <john.pennycook@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
…ut sub groups (intel#9543)

Change the fallback behavior for `PI_KERNEL_MAX_SUB_GROUP_SIZE` to
return the maximum sub group size for the device, rather than the
maximum work group size for the kernel, on devices where sub groups are
not supported. This change makes it consistent with the result of the
`PI_DEVICE_INFO_SUB_GROUP_SIZES_INTEL` query.

---------

Signed-off-by: Michael Aziz <michael.aziz@intel.com>
This patch adds a new interface that can be used to lookup the required
accuracy of floating-point builtin intrinsics for a specified type and
accuracy level (high, medium, low, sycl, or cuda).

A later change will add support for this functionality in the IRBuilder
class.
I believe the issue has been introduced in intel#9572.
pi_bool is uint32_t and ur_bool_t is uint8_t, so to make sure correct
functionality is maintained, use uint32_t as replacement for pi_bool,
instead of ur_bool_t.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
And use that as dynamic features in our SYCL End-to-End tests framework.
…ly` accessor (intel#9651)

* Modifies accessor::ConcreteASPtrType to be `const` for `readonly`
accessor to fix failing case where copying accessor<const T>::MData does
not compile when src type is `const` and dest is `non-const`.
* Add test
…#9642)

check_has.cpp strictly depends on order of sycl_declared_aspects and
srcloc metadata which is not guaranteed by compiler.
This test aims to check IR for device_has(aspect..., we can keep
sycl_declared_aspects and remove srcloc to avoid the dependency.

---------

Signed-off-by: jinge90 <ge.jin@intel.com>
@sys-ce-bb sys-ce-bb added disable-lint Skip linter check step and proceed with build jobs sycl-mlir Pull requests or issues for sycl-mlir branch labels May 31, 2023
@jsji jsji closed this May 31, 2023
@jsji jsji reopened this May 31, 2023
@whitneywhtsang whitneywhtsang merged commit 1225b3d into intel:sycl-mlir May 31, 2023
@whitneywhtsang whitneywhtsang deleted the sycl_mlir_pulldown branch May 31, 2023 17:57
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