[SYCL-MLIR] Merge from intel/llvm sycl branch #10724
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Although there are a few tests failing due to this change, we need to go with this change to avoid future regressions and unblock changes removing typed pointers support. The regressions are supposed to be fixed by follow-up patches.
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According to the SYCL 2020 spec, [[sycl::vec_type_hint()]] attribute should accept arguments of the type sycl::vec type. The attribute should also be accepted with non conforming lambda syntax. The current implementation in SYCL corresponds to the openCL version of this argument (with an additional spelling for SYCL), i.e. the attribute accepts extended vector type, floating point types and integral type. An error diagnostic is thrown for sycl:vec type. Since the attribute is deprecated and is not handled by any SYCL backend, and will be removed in a future version of the spec, to be minimally conformant with SYCL 2020 spec, this PR just ignores the attribute instead of adding support for sycl::vec type. Support was also added for non conforming lambda syntax
Use pull_request trigger (instead of pull_request_target) for everything except AWS CUDA E2E testing. The latter has to go to a separate workflow (workflow_run) in order to have access to the AWS EC key kept as a github secret. As part of the changes, I also stopped using matrix generator for the pre-commit task. Instead, the matrix is written directly inside the task's .yml file. The only minor difference in the behavior is that driver installation happens on an image with previous driver installed, not on a system without any driver.
The spec states that returning a `uniform` object is allowed: "Return values of type sycl::ext::oneapi::experimental::uniform<T> are not anyhow converted, and broadcast to each work-item; every work-item in the sub-group receives the same value. NOTE: sycl::ext::oneapi::experimental::uniform<T> return type is the way to return a uniform value of simd or simd_mask type." Update the compile-time error checking and ESIMD verifier to allow this. Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Single triple targets are only meant for manual run and should not be included into check-all, only check-sycl-combined-triples should be. Otherwise we are running the same tests from multiple processes resulting in race conditions (beside unnecessary work).
# Fix Mipmap Tests Fixing the computation of expected output values so that the tests also work with input sizes that are not powers of 2. --------- Co-authored-by: Dmitry Vodopyanov <dmitry.vodopyanov@intel.com>
This pull request introduces a new stand alone library, `SYCLcompat`: a simplified wrapper on top of SYCL, aiming to make it more accessible to developers familiar with other heterogeneous programming models. SYCLcompat has two primary goals: - Improve the adoption of SYCL. This library is designed to provide a familiar programming interface that resembles other popular heterogeneous programming models. By reducing the learning curve, it enables developers to leverage SYCL's power and features more easily. - Source-to-Source Translation Support. SYCLcompat is also designed to facilitate automatic source-to-source translation from other heterogeneous programming models to SYCL and offer a more standardized and consistent programming interface. This feature can significantly streamline the migration and integration of existing codebases into the SYCL ecosystem. The first commit of this PR includes the proposed library README, providing explanation of its motivation, public interface, usage guidelines, and code examples. A set of PRs will follow, including subsets of the current implementation including their tests. We are open to any suggestions, concerns, or improvements you may have, so please, let us know if you have any. Edit: Updated from extension to stand alone library. intel#9976 `dims.hpp` and `defs.hpp` headers --------- Co-authored-by: Gordon Brown <gordon@codeplay.com> Co-authored-by: Joe Todd <joe.todd@codeplay.com> Co-authored-by: Pietro Ghiglio <pietro.ghiglio@codeplay.com> Co-authored-by: Ruyman Reyes <ruyman@codeplay.com> Co-authored-by: Steffen Larsen <steffen.larsen@intel.com> Co-authored-by: aelovikov-intel <andrei.elovikov@intel.com> Co-authored-by: Sami Hatna <sami.hatna@codeplay.com> Co-authored-by: Joe Todd <joeatodd@users.noreply.github.com> Co-authored-by: Alexey Bader <alexey.bader@intel.com>
The recent sycl::vec changes (intel#9492) broke they unary operations. This PR fixes them and adds some testing to avoid that in the future.
…invocation (intel#10495) This PR adds support to multiple SYCL targets alongside `native_cpu` in the same compiler invocation (e.g. `clang++ -fsycl -fsycl-targets=native_cpu,spir64 input.cpp`). In order to implement this we had to make changes to multiple components, here is a quick overview: * Driver: changes in the Driver allow to correctly parse all the targets passed to `-fsycl-targets` (before we were just looking for `native_cpu`, ignoring the others). The Driver now also calls `sycl-post-link` and `clang-offload-wrapper`, performing a compilation flow more similar to the one used for other targets. * Sema: since the kernel name needs to be the same for all the SYCL targets, the change to the kernel name in Sema has been removed, and replaced with an LLVM Pass that gets run when lowering the device module (`llvm/lib/SYCLLowerIR/RenameKernelSYCLNativeCPU.cpp`). * Runtime: The definition for `_pi_program` in the Native CPU Plug-In now supports multiple kernels in one program, and the `__SYCL_PI_DEVICE_BINARY_TARGET_NATIVE_CPU` binary type has been added in order to identify kernels compiled for Native CPU. * clang-offload-wrapper: for Native CPU, the offload-wrapper doesn't bundle the device code in the host module, but instead produces an array containing function declarations that are resolved by the linker, see `sycl/doc/design/SYCLNativeCPU.md` for more information. --------- Co-authored-by: Uwe Dolinsky <uwe@codeplay.com> Co-authored-by: Alexey Sachkov <alexey.sachkov@intel.com> Co-authored-by: Steffen Larsen <steffen.larsen@intel.com>
This is an implementation of SYCLcompat, the stand alone library proposed in intel#9646. Please, find the documentation there. SYCLcompat has two primary goals: - Improve the adoption of SYCL. This library is designed to provide a familiar programming interface that resembles other popular heterogeneous programming models. By reducing the learning curve, it enables developers to leverage SYCL's power and features more easily. - Source-to-Source Translation Support. SYCLcompat is also designed to facilitate automatic source-to-source translation from other heterogeneous programming models to SYCL and offer a more standardized and consistent programming interface. This feature can significantly streamline the migration and integration of existing codebases into the SYCL ecosystem The PR also includes tests. We were advised to include the tests as part of `sycl/unittests`, so we added a different mechanism to build them using `clang`. As we stated in the docs PR, we are open to any suggestions, concerns, or improvements you may have, so please, let us know if you have any. --------- Co-authored-by: Gordon Brown <gordon@codeplay.com> Co-authored-by: Joe Todd <joe.todd@codeplay.com> Co-authored-by: Pietro Ghiglio <pietro.ghiglio@codeplay.com> Co-authored-by: Ruyman Reyes <ruyman@codeplay.com> Co-authored-by: tomflinda <tomflinda@gmail.com>
Fix static analyzer concern about dereferencing null value.
…10650) This PR changes `SYCLPropagateAspectsPass` to propagate aspects that come from `sycl_declared_aspects` even if they are excluded. The reason for this change is because a test like `no-fp64-optimization-declared-aspects.cpp` added in this PR would failed before with higher optimization level because - on the first aspect propagation pass, `fp64` is not propagated (to allow for trivial uses of `float x = 1.5` to optimized out) - the call to the function marked with `device_has(fp64)` is inlined on higher optimizations - that function does not actually use `double` in its body which means no usage of double ends up in the optimized function, leading the second aspect propagation pass to not attach `fp64` to its used aspects metadata. --------- Co-authored-by: Alexey Sachkov <alexey.sachkov@intel.com> Co-authored-by: Marcos Maronas <maarquitos14@users.noreply.github.com>
…l#10740) Scheduler::checkLeavesCompletion checks status of all leaves of the buffer to see whether we can destroy that sycl::buffer. There are many scenarios when alloca commands are leaves, these commands don't have associated event and currently they are always incorrectly considered "in progress" because of that preventing buffers to be destroyed timely and deferring their destruction till the point of program termination. Skip alloca commands to fix that.
…ghtly (intel#10745) Also changes daily build upload (via github release) to only require successful build/LIT and not E2E tests. In addition to that, I switched CUDA E2E from using AWS runner to using our self-hosted one. The load of this workflow is low so our single runner can handle that. --------- Co-authored-by: Steffen Larsen <steffen.larsen@intel.com>
intel#10743) This eliminates the usage of matrix generator in post-commit, following a similar change done in pre-commit earlier.
The underlying issue in the GPU RT seems to have been fixed, verified locally. Closes intel#8103.
…intel#10716) This patch updates sycl_ext_oneapi_device_architecture extension with the following: * add missing architecture: * intel_gpu_ehl and its sibling - intel_gpu_jsl * add missing aliases to existing architectures: * intel_gpu_bxt (alias to intel_gpu_apl) * intel_gpu_dg2_g10 (alias to intel_gpu_acm_g10) * intel_gpu_dg2_g11 (alias to intel_gpu_acm_g11) * intel_gpu_dg2_g12 (alias to intel_gpu_acm_g12) * remove unnecessary implementation details for intel_gpu_rpl_s from the driver and make it dependent on intel_gpu_adl_s as they are the same architectures
…ters Signed-off-by: Tsang, Whitney <whitney.tsang@intel.com>
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Signed-off-by: Tsang, Whitney <whitney.tsang@intel.com>
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Aug 11, 2023
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Please only review d0ff1ac and file with conflict:
479c2cc reverted switch SPIR-V offload target to opaque pointers, due to LIT failures: