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amba

Here are 37 public repositories matching this topic...

taichi-ishitani / tvip-axi

AMBA AXI VIP

vip systemverilog uvm axi amba axi4 amba-axi

Updated Jun 28, 2024
SystemVerilog

rggen / rggen

Code generation tool for control and status registers

asic fpga vhdl eda rtl verilog csr systemverilog soc uvm ral axi amba apb register-descriptions wishbone-bus uvm-ral-model uvm-register-model wiki-documents

Updated Nov 15, 2024
Ruby

taichi-ishitani / tnoc

Network on Chip Implementation written in SytemVerilog

systemverilog uvm noc axi amba network-on-chip axi4 amba-axi

Updated Aug 27, 2022
SystemVerilog

dpretet / axi-crossbar

An AXI4 crossbar implementation in SystemVerilog

arm asic fpga processor riscv verilog soc fpga-soc interconnect amba crossbar riscv32 axi4 axi4-lite riscv64 monodraw axi4-protocol asic-design axi4-full

Updated Nov 11, 2024
SystemVerilog

arm-university / Introduction-to-SoC-Design-Education-Kit

Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals

arm fpga cortex-m cmsis hardware-designs soc arm-cortex-m0 system-on-chip amba keil-mdk system-on-chip-design design-start

Updated Jul 26, 2024
HTML

lucky-wfw / ARM_AMBA_Design

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

arm verilog axi amba apb ahb

Updated May 14, 2021
Verilog

SystemRDL / PeakRDL

Control and status register code generator toolchain

asic fpga eda verilog csr command-line-tool systemverilog uvm registers axi amba apb register-descriptions systemrdl-compiler hardware-description-language uvm-register-model

Updated Sep 3, 2024
Python

arm-university / Efficient-Embedded-Systems-Design-Education-Kit

Design and program Arm-based embedded systems and implement them in low-level hardware using standard C and assembly language.

arm embedded cortex-m embedded-systems hardware-designs armv8 trustzone amba arm-cortex-m4 keil-mdk embedded-system-design st-nucleo-f401re arm-cortex-m33 discovery-f4 st-nucleo-l552ze

Updated Aug 12, 2024
C

arm-university / Advanced-System-on-Chip-Design-Education-Kit

Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description and software programming languages

arm fpga armv7 hardware-designs cortex-a amba cortex-a9 arm-cortex-a9 soc-design system-on-chip-design zybo-z7-10

Updated Jul 26, 2024
HTML

RoaLogic / ahb3lite_interconnect

AHB3-Lite Interconnect

switch interconnect amba ahb3-lite

Updated May 10, 2024
SystemVerilog

prajwalgekkouga / AHB-to-APB-Bridge

The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.

fpga digital verilog modelsim amba apb ahb verilog-project

Updated Oct 7, 2022
Verilog

RoaLogic / ahb3lite_apb_bridge

Parameterised Asynchronous AHB3-Lite to APB4 Bridge.

amba apb ahb3-lite apb-bridge

Updated May 10, 2024
SystemVerilog

taichi-ishitani / tvip-apb

Verification IP for AMBA APB Protocol

vip systemverilog uvm amba apb

Updated Nov 7, 2023
SystemVerilog

arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

A textbook on understanding system on chip design

fpga embedded-systems textbook cmsis soc fpga-soc trustzone amba cpu-architecture arm-cortex-m soc-design system-on-chip-design bus-architecture

Updated Jul 19, 2023

somyadashora / AMBA-AXI4-Lite

Master and Slave made using AMBA AXI4 Lite protocol.

design verilog amba axi4-lite

Updated Oct 9, 2020
Stata

RoaLogic / ahb3lite_memory

Multi-Technology RAM with AHB3Lite interface

amba ahb3-lite ahb3lite-memory

Updated May 10, 2024
SystemVerilog

arm-university / System-on-Chip-Design-with-Arm-Cortex-M-Processors

A reference book on System-on-Chip Design

cortex-m embedded-systems software-design amba arm-cortex-m soc-design keil-mdk system-on-chip-design bus-architecture cortex-m-processors reference-book

Updated Apr 5, 2024

TILhub / AMBA-3-AHB-Lite-Protocol

This Repo contains SystemC for testBench for AMBA® 3 AHB-Lite Protocol

arm cplusplus protocol emulation stl systemc lite testbenches testbench amba ahb-lite

Updated Jul 11, 2018
C++

merledu / caravan

A caravan equipped with API for creating bus protocols in Chisel with ease.

chisel3 wishbone caravan amba chisel-generator on-chip-network bus-protocols

Updated Oct 3, 2024
Scala

PXVI / ip_amba_apb_ms_rtl_v

The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )

lint master memory slave rtl ip verilog amba apb3

Updated Aug 20, 2022
Verilog

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