…o_int64 and of_int64

Implement i16x8 operations

Implement add sub neg for i8x16, this passes simd_i8x16_arith.wast.

Merge upstream

This passes simd_i8x16_arith2.wast.

Add i64x2.{neg,add,sub,mul}, now simd/simd_i64x2_arith.wast passes.

* Update v128.const implementation status for v8

* Add note about Chrome version

Not, and, or, xor, andnot.

Create V128 submodule for vector bitwise ops, converting to i64x2 for the actual operations

{i8x16,i16x8,i32x4}_{any_true,all_true}

v128.bitselect is used in the tests (simd_boolean.wast) so implemented
here using a new AST node, Ternary. Bitselect is the only ternary
instruction now.

Packed data is not defined anywhere. We can specify SIMD as a i128
(128-bit integer). Later when specifying the SIMD instructions, we can
use some "expansions" to expand i128 into the required lane shapes.

Also, use v128 instead of s128, v128 is already commonly used in many
places in this proposal, in the BinarySIMD.md, SIMD.md, and reference
interpreter.

i8x16, i16x8, i32x4, i64x2, f32x4, f64x2 splats.

Implemented using Convert ast as a splat essentially takes a value of
every other type to V128.

shr_u is a bit more tricky due for I8 and I16. E.g. -128 in I8 has all
top bits set (sign extended) in an int32, and shr_u using Int's
implementation will result in 0xffffffc0, instead of 0x000000c0. But we
can't simply change the implementation, since parsing relies on this
behavior. I'll figure that out in a later patch.

Lost the token in the parser during rebases.

i8x16, i16x8, i32x4, i64x2 eq, ne, lt_s, lt_u, le_s, le_u, gt_s, gt_u,
ge_s, ge_u.

Implemented in terms of Binary operations, since they return the same
v128 type, rather than a boolean like for I32 and I64.

Lanes that compare true return all 1s, otherwise all 0s.

f32x4, f64x2 eq, ne, lt, le, gt, ge. Similar to integer comparisons,
this is implemented with the Binary ast node.

This got lost in the rebase too, and WebAssembly#277 only partially fixed it.

The Bytes [0] functions we use require 4.08.1. This should only be set
on SIMD repo, since bytes is only used for SIMD implementation. By the
time we would like to merge this back into main spec, 4.08.1 should
hopefully be widespread enough for us to bump minimum version of OCaml
for spec to 4.08.1 too.

[0] https://caml.inria.fr/pub/docs/manual-ocaml/libref/Bytes.html see
"Binary encoding/decoding of integers"

i8x16, i16x8, i64x2, f64x2.

Created a new extractop that is based on v128op. Use extension type to
determine signed or unsigned extract (only used for i8x16 and i16x8).

Decided to cheat a little bit, and squeeze v8x16.swizzle into the i8x16
ast node, so that we don't have to create a new v8x16 data type.
Semantically it means the same thing, v8x16 is called that way since it
doesn't treat the underlying data as any particular type, so treating it
as int will work too.

The error messages don't match the tests yet (simd_lane.wast), that
still needs to be worked out in WebAssembly#287.

- lane indices are u8 (nats), negative values are now parse errors ("unexpected token"), as are values with a positive sign +0x1
- changed a bunch of "expected i8 literal" to "unexpected token", in order to differentiate these syntax errors we probably need to change the parser to match on a bunch of EXTRACT_LANE <token we don't care about>
- some "type mismatch" are now unexpected token

Fixed WebAssembly#287

Merge upstream

It was incorrectly using the non-saturing versions, leading to runtime
traps.

* Extract lane, parse error for i8x16 and i16x8
* Parse error if simd lane index cannot fit in u8
* Validate lane index in extract and replace

- some test cases were not written in the correct text format
- no more "expected i8 literal", it is now "malformed lane index"
- "v8x16.shuffle (v128.const)" is parsed as shuffle with no literals, so
the error is "invalid lane length"

* Implement SIMD narrow and widen

These are the operations implemented:

- i8x16.narrow_i16x8_s(a: v128, b: v128) -> v128
- i8x16.narrow_i16x8_u(a: v128, b: v128) -> v128
- i16x8.narrow_i32x4_s(a: v128, b: v128) -> v128
- i16x8.narrow_i32x4_u(a: v128, b: v128) -> v128
- i16x8.widen_low_i8x16_s(a: v128) -> v128
- i16x8.widen_high_i8x16_s(a: v128) -> v128
- i16x8.widen_low_i8x16_u(a: v128) -> v128
- i16x8.widen_high_i8x16_u(a: v128) -> v128
- i32x4.widen_low_i16x8_s(a: v128) -> v128
- i32x4.widen_high_i16x8_s(a: v128) -> v128
- i32x4.widen_low_i16x8_u(a: v128) -> v128
- i32x4.widen_high_i16x8_u(a: v128) -> v128

This now passes test/core/simd/simd_conversions.wast.

* Fix formatting and ordering of definitions

* Apply suggestions from code review

- Remove unnecessary parens
- use 0xffl for int32
- inline the masks

Co-authored-by: Andreas Rossberg <rossberg@mpi-sws.org>

* Have widen take a mask instead of function

* Pass param as int32 to avoid conversions

* Remove _using suffix

Co-authored-by: Andreas Rossberg <rossberg@mpi-sws.org>

These operations are implemented:

- i8x16.add_saturate_s(a: v128, b: v128) -> v128
- i8x16.add_saturate_u(a: v128, b: v128) -> v128
- i16x8.add_saturate_s(a: v128, b: v128) -> v128
- i16x8.add_saturate_u(a: v128, b: v128) -> v128
- i8x16.sub_saturate_s(a: v128, b: v128) -> v128
- i8x16.sub_saturate_u(a: v128, b: v128) -> v128
- i16x8.sub_saturate_s(a: v128, b: v128) -> v128
- i16x8.sub_saturate_u(a: v128, b: v128) -> v128

This passes simd_i8x16_sat_arith.wast and simd_i16x8_sat_arith.wast.

This is sufficient to pass test/core/simd/simd_i32x4_arith.wast.

… ops (WebAssembly#303)

This is sufficient to pass:
- test/core/simd/simd_i32x4_arith2.wast
- test/core/simd/simd_i8x16_arith.wast
- test/core/simd/simd_i8x16_arith2.wast
- test/core/simd/simd_i16x8_arith.wast.
- test/core/simd/simd_i16x8_arith2.wast

This is sufficient to pass test/core/simd/simd_i64x2_arith.wast.

This is sufficient to pass simd_f32x4.wast, simd_f32x4_arith.wast, and
simd_f32x4_cmp.wast.

This is sufficient to pass simd_f64x2.wast, simd_f64x2_arith.wast, and
simd_f64x2_cmp.wast.

This is sufficient to pass simd_i8x16_cmp.wast, simd_i16x8_cmp.wast, and
simd_i32x4_cmp.wast.

This is sufficient to pass simd_bitwise.wast.

This is sufficient to pass simd_boolean.wast.

This is sufficient to pass simd_load.wast and simd_store.wast. There are
some extra instructions, like swizzle and i8x16.shl that is implemented
here, because simd_load.wast uses them.

…#314)

This is sufficient to pass simd_lane.wast.

…sembly#315)

This is sufficient to pass simd_conversions.wast.

…ts (WebAssembly#317)

This is sufficient to pass simd_splat.wast.

Shifting requires masking i8 and i16 top bits first, since we store them
sign-extended.

Implement `needs_extend` correctly, previously it was implementing the
opposite, but it was used by callers correctly, so change all callers
to use `not needs_extend`.

i8x16.bitmask, i16x8.bitmask, i32x4.bitmask. Add some tests to
simd_boolean.wast (just a simple correctness check, future work is to
generate the test, move it into a python script.)

This introduces a new AST, SimdBitmask, since it doesn't really fit in
with any existing AST (Test returns a bool).

Print out the full i32 hex string, then extract the lower 2 or 4 chars.

Adding all shr_u and also i64x2 shifts.

Add more pack types for SIMD load splat and load extends.

Merge from upstream spec

* Implement JS output for SIMD

V128 is not exposed to JS at all, so transform all functions with V128
in the signatures into consts, compare with the expected value, and
reduce it to a int32.

An assertion against a SimdResult needs to be converted into a plain
Const containing a v128. This conversion is tricky since SimdResult can
contain both LitPat and NanPat. NaNs need special treatment to mask and
compare to a canonical value. For simplicity, we build a mask for all
the patterns in a SimdResult (even for literals, which will have a mask
with all bits set). That way the test is consistent:

- v128.const(mask)
- v128.and
- v128.const(expected)
- i8x16.eq
- i8x16.all_true
- br_if 0 to unreachable

* Formatting fixes

Co-authored-by: Andreas Rossberg <rossberg@mpi-sws.org>

* Remove redundant prefixes

Co-authored-by: Andreas Rossberg <rossberg@mpi-sws.org>

* Implement SIMD load splat and load extend

Add more pack types for SIMD load splat and load extends.

* Create new pack_simd type and SimdLoad AST

* Reorder functions

* Formatting

* Simplify simd packed loads

* Add SimdStore and make simd_loadop more consistent
New AST nodes SimdLoad and SimdStore.

The names are still pre WebAssembly#297, once that's finalize I can fix this up
(after the sync WebAssembly#323).

With this change, test/core/run.py passes on all test cases in simd/.

Implement binary<->text support for SIMD load splats and extends

Bitmask was confused about endianness. The text format for v128.const is
little endian, so the lowest lane set translates to the least
significant bit set.

This enables running all the SIMD tests (in test/core/simd) whenever we
do `make test`.

v8x16.shuffle and v8x16.swizzle is now i8x16.shuffle and i8x16.swizzle
respectively.

Fixed WebAssembly#316.

Following suggestions in WebAssembly#297, renaming load splats and load extends to
something more consistent.

Fixed WebAssembly#297.

* Specify text format for SIMD

* Reword description of SIMD memory instructions

Co-authored-by: Ben Smith <binjimin@gmail.com>

Also update the test generation script, and regenerate all test files.

Adressess WebAssembly#332 (not closing so other tools can also use it to track their rename progress).

Introduce Pseudo-Minimum (`f32x4.pmin` and `f64x2.pmin`) and Pseudo-Maximum (`f32x4.pmax` and `f64x2.pmax`) instructions, which implement Pseudo-Minimum and Pseudo-Maximum operations with slightly different semantics than the Minimum and Maximum in the current spec. Pseudo-Minimum is defined as `pmin(a, b) := b < a ? b : a` and Pseudo-Maximum is defined as `pmax(a, b) := a < b ? b : a`. "Pseudo" in the name refers to the fact that these operations may not return the minimum in case of signed zero inputs, in particular:
- `pmin(+0.0, -0.0) == +0.0`
- `pmax(-0.0, +0.0) == -0.0`

New floating-point rounding instructions:

- Round to nearest integer, ties to even: `f32x4.nearest`/`f64x2.nearest`
- Round to integer towards zero (truncate to integer): `f32x4.trunc`/`f64x2.trunc`
- Round to integer above (ceiling): `f32x4.ceil`/`f64x2.ceil`
- Round to integer below (floor): `f32x4.floor`/`f64x2.floor`

Also formatting of SIMD instructions

Implement f32x4 and f64x2 ceil, floor, trunc, nearest. They have the
same behavior as the f32 and f64 instructions.

Also implemented to encoding and decoding.

These new instructions were added to simd_f32x4.wast test case, and the
test generation script is updated with these new instructions.

)

Add pmin/pmax and mark pmin/pmax and floating-point rounding
instructions as implemented on both V8 and SM (based on this
mozilla/gecko-dev@8070228).

…ebAssembly#353)

Implement f32x4 pmin, pmax, and f64x2 pmin, pmax.

Encoding/decoding is included.

Added new test generation scripts and generated tests.

Merge upstream/master

Replace them with assert false, to indicate that those aren't supposed
to happen, rather than unimplemented.

* Move simd operations out into a new file

* Rename Ternary to SimdTernary