Formal (VC Formal FPV) and UVM verification of an 8-lane mixed-precision INT8/BF16/NVFP4 dot-product core, with a shared SystemVerilog golden reference across assertions and scoreboards.
eda rtl systemverilog uvm formal-verification int8 sva dot-product questa hardware-verification mixed-precision design-verification bfloat16 nvfp4 vc-formal assume-guarantee
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Updated
Jul 4, 2026 - SystemVerilog