A RISC-V MCU, written in VHDL, and for learning purposes.
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Updated
Sep 2, 2026 - VHDL
A RISC-V MCU, written in VHDL, and for learning purposes.
Innervator: Hardware Acceleration for Neural Networks
This repository contains VHDL implementations for all hardware design challenges (quests/questions) featured on the chipdev.io website.
Reusable HDL modules, packages, and testbench utilities for FPGA and ASIC development, supporting both VHDL and Verilog.
A VHDL code base that contains Utility Packages for both HDL and Testbenches
An AXI4/5-Stream PID controller
An AXI4/5-Stream exponential moving average (EMA) filter
Synthesisable VHDL-2008 cores for Kalyna (DSTU 7624:2014), Strumok (DSTU 8845:2019), Kuznyechik, GOST 28147-89 and RC4 — each with a self-checking testbench validated against published vectors (RFC 7801/8891, DSTU Annex D).
VHDL RTL design exercises covering counters, synchronization, FSM control and APB integration.
Board-agnostic VHDL 2008 Game Boy-style VGA pixel pipeline with tile/sprite rendering, GHDL tests & synthesis.
Digital Signal Processing — fundamentals to ECG denoising project
LogiMentor floating point VHDL library
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