asic-verification

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VIP for AXI Protocol

uvm sv asic-verification amba-axi design-verification

Application Specific Integrated Circuit(ASIC)

BDD Gherkin implementation in native SystemVerilog, based on UVM.

asic fpga bdd bdd-specs rtl verilog systemverilog uvm verilog-hdl bdd-framework asic-verification design-verification asic-design rtl-design soc-design soc-verification uvm-verification

UVM testbench for verifying a packet router using the YAPP (Yet Another Packet Protocol)

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