[FIRRTL][CheckCombLoops] Missing RWProbeOp support, crashes

[dtzSiFive]

Example FIRRTL:

FIRRTL version 3.3.0
circuit Bar :
  module Foo :
    input clock : Clock
    output clockProbe_bore : RWProbe<Clock>

    define clockProbe_bore = rwprobe(clock)

  module Bar :
    input clock : Clock
    output clockProbe : RWProbe<Clock>

    inst foo of Foo
    connect foo.clock, clock
    define clockProbe = foo.clockProbe_bore

    force(clock, UInt<1>(1), clockProbe, asClock(UInt<1>(0)))

--parse-only:

firrtl.circuit "Bar" {
  firrtl.module private @Foo(in %clock: !firrtl.clock sym @sym, out %clockProbe_bore: !firrtl.rwprobe<clock>) {
    %0 = firrtl.ref.rwprobe <@Foo::@sym> : !firrtl.rwprobe<clock>
    firrtl.ref.define %clockProbe_bore, %0 : !firrtl.rwprobe<clock>
  }
  firrtl.module @Bar(in %clock: !firrtl.clock, out %clockProbe: !firrtl.rwprobe<clock>) attributes {convention = #firrtl<convention scalarized>} {
    %foo_clock, %foo_clockProbe_bore = firrtl.instance foo @Foo(in clock: !firrtl.clock, out clockProbe_bore: !firrtl.rwprobe<clock>)
    firrtl.strictconnect %foo_clock, %clock : !firrtl.clock
    firrtl.ref.define %clockProbe, %foo_clockProbe_bore : !firrtl.rwprobe<clock>
    %c1_ui1 = firrtl.constant 1 : !firrtl.uint<1>
    %c0_ui1 = firrtl.constant 0 : !firrtl.uint<1>
    %0 = firrtl.asClock %c0_ui1 : (!firrtl.uint<1>) -> !firrtl.clock
    firrtl.ref.force %clock, %c1_ui1, %clockProbe, %0 : !firrtl.clock, !firrtl.uint<1>, !firrtl.clock
  }
}

Crashes (or assert failure) when trying to resolve the force.

Flagged in review: #5647 (comment) .

[dtzSiFive]

I'll PR a workaround to unbreak RWProbe, assigned to you @prithayan since you're familiar and I believe already working on it. LMK if have any questions or can help 👍.

(RWProbeOp resolution may be lacking re:ergonomics for this usage presently)