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Pull requests: llvm/circt
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[ImportVerilog]: Create variables for function arguments
ImportVerilog
Moore
#7829
opened Nov 16, 2024 by
Max-astro
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[FIRRTL] LowerClasses: drop the IR mapping
FIRRTL
Involving the `firrtl` dialect
#7824
opened Nov 15, 2024 by
rwy7
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[Draft] [OpLib] Create a Dialect for Representing Operator Libraries
#7771
opened Nov 4, 2024 by
andrewb1999
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Draft
[Calyx] Binary Floating Point MulF Operator
Calyx
The Calyx dialect
#7769
opened Nov 3, 2024 by
jiahanxie353
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[FIRRTL] Add a new FIRRTL annotation to specify type lowering behavior of module body
#7751
opened Oct 30, 2024 by
uenoku
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[SCFToCalyx] If op with sequential condition
Calyx
The Calyx dialect
#7687
opened Oct 9, 2024 by
jiahanxie353
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[Arc] Implement memory initializers
Arc
Involving the `arc` dialect
#7559
opened Aug 28, 2024 by
fzi-hielscher
•
Draft
[FIRRTL] Verify enabled layers of module, extmodule.
#7557
opened Aug 26, 2024 by
dtzSiFive
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Updated in the last three days: updated:>2024-11-15.