Skip to content

JIT: ARM64 SVE format encodings, SVE_HX_3A_B to SVE_JL_3A and SVE_IC_3A to SVE_IC_3A_C #98332

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 13 commits into from
Feb 16, 2024

Conversation

TIHan
Copy link
Contributor

@TIHan TIHan commented Feb 13, 2024

Contributes to #94549

Adds formats:

  • SVE_HX_3A_B
  • SVE_HX_3A_E
  • SVE_IV_3A
  • SVE_JI_3A_A
  • SVE_JL_3A
  • SVE_IC_3A
  • SVE_IC_3A_A
  • SVE_IC_3A_B
  • SVE_IC_3A_C

Left: Capstone,
Right: Jit
image

@ghost ghost assigned TIHan Feb 13, 2024
@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Feb 13, 2024
@ghost
Copy link

ghost commented Feb 13, 2024

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

Issue Details

Contributes to #94549

Adds formats:

  • SVE_HX_3A_B
  • SVE_HX_3A_E
  • SVE_IV_3A
  • SVE_JI_3A_A
  • SVE_JL_3A
  • SVE_IC_3A
  • SVE_IC_3A_A
  • SVE_IC_3A_B
  • SVE_IC_3A_C

Left: Capstone,
Right: Jit
image

Author: TIHan
Assignees: TIHan
Labels:

area-CodeGen-coreclr

Milestone: -

@TIHan TIHan changed the title JIT: ARM64 SVE format encodings, SVE_HX_3A_B to SVE_JL_3A' and SVE_IC_3A to SVE_IC_3A_C` JIT: ARM64 SVE format encodings, SVE_HX_3A_B to SVE_JL_3A and SVE_IC_3A to SVE_IC_3A_C Feb 13, 2024
@TIHan
Copy link
Contributor Author

TIHan commented Feb 13, 2024

@dotnet/jit-contrib @dotnet/arm64-contrib @kunalspathak @a74nh this is ready.

@ryujit-bot
Copy link

Diff results for #98332

Throughput diffs

Throughput diffs for linux/arm64 ran on windows/x64

Overall (+0.04% to +0.08%)
Collection PDIFF
benchmarks.run.linux.arm64.checked.mch +0.04%
benchmarks.run_pgo.linux.arm64.checked.mch +0.05%
benchmarks.run_tiered.linux.arm64.checked.mch +0.08%
coreclr_tests.run.linux.arm64.checked.mch +0.06%
libraries.crossgen2.linux.arm64.checked.mch +0.08%
libraries.pmi.linux.arm64.checked.mch +0.05%
libraries_tests.run.linux.arm64.Release.mch +0.06%
libraries_tests_no_tiered_compilation.run.linux.arm64.Release.mch +0.05%
realworld.run.linux.arm64.checked.mch +0.05%
smoke_tests.nativeaot.linux.arm64.checked.mch +0.05%
MinOpts (+0.06% to +0.18%)
Collection PDIFF
benchmarks.run.linux.arm64.checked.mch +0.14%
benchmarks.run_pgo.linux.arm64.checked.mch +0.12%
benchmarks.run_tiered.linux.arm64.checked.mch +0.12%
coreclr_tests.run.linux.arm64.checked.mch +0.08%
libraries.crossgen2.linux.arm64.checked.mch +0.15%
libraries.pmi.linux.arm64.checked.mch +0.06%
libraries_tests.run.linux.arm64.Release.mch +0.12%
libraries_tests_no_tiered_compilation.run.linux.arm64.Release.mch +0.09%
realworld.run.linux.arm64.checked.mch +0.15%
smoke_tests.nativeaot.linux.arm64.checked.mch +0.18%
FullOpts (+0.04% to +0.08%)
Collection PDIFF
benchmarks.run.linux.arm64.checked.mch +0.04%
benchmarks.run_pgo.linux.arm64.checked.mch +0.04%
benchmarks.run_tiered.linux.arm64.checked.mch +0.04%
coreclr_tests.run.linux.arm64.checked.mch +0.05%
libraries.crossgen2.linux.arm64.checked.mch +0.08%
libraries.pmi.linux.arm64.checked.mch +0.05%
libraries_tests.run.linux.arm64.Release.mch +0.04%
libraries_tests_no_tiered_compilation.run.linux.arm64.Release.mch +0.05%
realworld.run.linux.arm64.checked.mch +0.04%
smoke_tests.nativeaot.linux.arm64.checked.mch +0.05%

Throughput diffs for osx/arm64 ran on windows/x64

Overall (+0.04% to +0.08%)
Collection PDIFF
benchmarks.run.osx.arm64.checked.mch +0.04%
benchmarks.run_pgo.osx.arm64.checked.mch +0.06%
benchmarks.run_tiered.osx.arm64.checked.mch +0.07%
coreclr_tests.run.osx.arm64.checked.mch +0.06%
libraries.crossgen2.osx.arm64.checked.mch +0.08%
libraries.pmi.osx.arm64.checked.mch +0.05%
libraries_tests.run.osx.arm64.Release.mch +0.07%
libraries_tests_no_tiered_compilation.run.osx.arm64.Release.mch +0.05%
realworld.run.osx.arm64.checked.mch +0.04%
MinOpts (+0.06% to +0.15%)
Collection PDIFF
benchmarks.run.osx.arm64.checked.mch +0.13%
benchmarks.run_pgo.osx.arm64.checked.mch +0.11%
benchmarks.run_tiered.osx.arm64.checked.mch +0.11%
coreclr_tests.run.osx.arm64.checked.mch +0.08%
libraries.crossgen2.osx.arm64.checked.mch +0.15%
libraries.pmi.osx.arm64.checked.mch +0.06%
libraries_tests.run.osx.arm64.Release.mch +0.12%
libraries_tests_no_tiered_compilation.run.osx.arm64.Release.mch +0.09%
realworld.run.osx.arm64.checked.mch +0.15%
FullOpts (+0.03% to +0.08%)
Collection PDIFF
benchmarks.run.osx.arm64.checked.mch +0.04%
benchmarks.run_pgo.osx.arm64.checked.mch +0.03%
benchmarks.run_tiered.osx.arm64.checked.mch +0.04%
coreclr_tests.run.osx.arm64.checked.mch +0.05%
libraries.crossgen2.osx.arm64.checked.mch +0.08%
libraries.pmi.osx.arm64.checked.mch +0.05%
libraries_tests.run.osx.arm64.Release.mch +0.04%
libraries_tests_no_tiered_compilation.run.osx.arm64.Release.mch +0.05%
realworld.run.osx.arm64.checked.mch +0.04%

Throughput diffs for windows/arm64 ran on windows/x64

Overall (+0.04% to +0.08%)
Collection PDIFF
benchmarks.run.windows.arm64.checked.mch +0.04%
benchmarks.run_pgo.windows.arm64.checked.mch +0.05%
benchmarks.run_tiered.windows.arm64.checked.mch +0.07%
coreclr_tests.run.windows.arm64.checked.mch +0.06%
libraries.crossgen2.windows.arm64.checked.mch +0.08%
libraries.pmi.windows.arm64.checked.mch +0.05%
libraries_tests.run.windows.arm64.Release.mch +0.07%
libraries_tests_no_tiered_compilation.run.windows.arm64.Release.mch +0.05%
realworld.run.windows.arm64.checked.mch +0.04%
smoke_tests.nativeaot.windows.arm64.checked.mch +0.05%
MinOpts (+0.07% to +0.18%)
Collection PDIFF
benchmarks.run.windows.arm64.checked.mch +0.13%
benchmarks.run_pgo.windows.arm64.checked.mch +0.11%
benchmarks.run_tiered.windows.arm64.checked.mch +0.11%
coreclr_tests.run.windows.arm64.checked.mch +0.08%
libraries.crossgen2.windows.arm64.checked.mch +0.15%
libraries.pmi.windows.arm64.checked.mch +0.07%
libraries_tests.run.windows.arm64.Release.mch +0.12%
libraries_tests_no_tiered_compilation.run.windows.arm64.Release.mch +0.09%
realworld.run.windows.arm64.checked.mch +0.15%
smoke_tests.nativeaot.windows.arm64.checked.mch +0.18%
FullOpts (+0.04% to +0.08%)
Collection PDIFF
benchmarks.run.windows.arm64.checked.mch +0.04%
benchmarks.run_pgo.windows.arm64.checked.mch +0.04%
benchmarks.run_tiered.windows.arm64.checked.mch +0.04%
coreclr_tests.run.windows.arm64.checked.mch +0.05%
libraries.crossgen2.windows.arm64.checked.mch +0.08%
libraries.pmi.windows.arm64.checked.mch +0.05%
libraries_tests.run.windows.arm64.Release.mch +0.04%
libraries_tests_no_tiered_compilation.run.windows.arm64.Release.mch +0.05%
realworld.run.windows.arm64.checked.mch +0.04%
smoke_tests.nativeaot.windows.arm64.checked.mch +0.05%

Details here


Throughput diffs for linux/arm64 ran on linux/x64

MinOpts (-0.00% to +0.01%)
Collection PDIFF
benchmarks.run.linux.arm64.checked.mch +0.01%

Details here


Copy link
Contributor

@a74nh a74nh left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Otherwise everything else looks fine.

@kunalspathak kunalspathak added the arm-sve Work related to arm64 SVE/SVE2 support label Feb 13, 2024
Copy link
Member

@amanasifkhalid amanasifkhalid left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM, thanks!

*
* Prints the encoding for format [<Zn>.D{, #<imm>}]
*/
void emitter::emitDispSveImmIndex(regNumber reg1, insOpts opt, ssize_t imm)
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Can this logic be merged into emitDispSveImm in #98468 (or the other way around)?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It doesn't matter either way. I'll have to resolve any conflicts when my PRs get merged, and that will include some cleanup.

@amanasifkhalid
Copy link
Member

amanasifkhalid commented Feb 15, 2024

Also do you know where the TP impact is coming from on Windows x64? Your changes look like they only affect SVE paths.

@TIHan
Copy link
Contributor Author

TIHan commented Feb 15, 2024

It's probably just the additional cases in emitIns. Should split it out to see if the TP regressions clear up.

@ryujit-bot
Copy link

Diff results for #98332

Throughput diffs

Throughput diffs for linux/arm64 ran on windows/x64

MinOpts (-0.00% to +0.01%)
Collection PDIFF
libraries.pmi.linux.arm64.checked.mch +0.01%
realworld.run.linux.arm64.checked.mch +0.01%

Throughput diffs for osx/arm64 ran on windows/x64

MinOpts (-0.01% to +0.01%)
Collection PDIFF
libraries.pmi.osx.arm64.checked.mch -0.01%
realworld.run.osx.arm64.checked.mch +0.01%

Details here


@TIHan
Copy link
Contributor Author

TIHan commented Feb 16, 2024

Merging, failures are not related.

@TIHan TIHan merged commit cd85023 into dotnet:main Feb 16, 2024
@TIHan TIHan deleted the arm64_sve_format_group9 branch February 16, 2024 18:35
@github-actions github-actions bot locked and limited conversation to collaborators Mar 18, 2024
Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Labels
area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI arm-sve Work related to arm64 SVE/SVE2 support
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants