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Workspace Issues: Compile errors with firrtl master #499

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donggyukim opened this issue Feb 9, 2017 · 12 comments
Closed

Workspace Issues: Compile errors with firrtl master #499

donggyukim opened this issue Feb 9, 2017 · 12 comments

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@donggyukim
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donggyukim commented Feb 9, 2017

I have compile errors with firrtl master as follows:

[info] Compiling 3 Scala sources to /scratch/dgkim/riscv-mini/chisel/coreMacros/target/scala-2.11/classes...
[info] Compiling 25 Scala sources to /scratch/dgkim/riscv-mini/chisel/chiselFrontend/target/scala-2.11/classes...
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:7: object annotations is not a member of package firrtl
[error] import firrtl.annotations.{Annotation, CircuitName, ComponentName, ModuleName}
[error]               ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:18: not found: type Annotation
[error]   def toFirrtl: Annotation = {
[error]                 ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:19: not found: value CircuitName
[error]     val circuitName = CircuitName(component.pathName.split("""\.""").head)
[error]                       ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:22: not found: value Annotation
[error]         Annotation(
[error]         ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:23: not found: value ModuleName
[error]           ModuleName(m.name, circuitName), transformClass, value)
[error]           ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:25: not found: value Annotation
[error]         Annotation(
[error]         ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:26: not found: value ComponentName
[error]           ComponentName(
[error]           ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:27: not found: value ModuleName
[error]             component.instanceName, ModuleName(component.parentModName, circuitName)), transformClass, value)
[error]                                     ^
[warn] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala:17: inferred existential type Option[(chisel3.internal.InstanceId, Class[_$1], String)] forSome { type _$1 <: firrtl.Transform }, which cannot be expressed by wildcards,  should be enabled
[warn] by making the implicit value scala.language.existentials visible.
[warn] This can be achieved by adding the import clause 'import scala.language.existentials'
[warn] or by setting the compiler option -language:existentials.
[warn] See the Scala docs for value scala.language.existentials for a discussion
[warn] why the feature should be explicitly enabled.
[warn] case class ChiselAnnotation(component: InstanceId, transformClass: Class[_ <: Transform], value: String) {
[warn]            ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala:10: object annotations is not a member of package firrtl
[error] import _root_.firrtl.annotations.Annotation
[error]                      ^
[error] /scratch/dgkim/riscv-mini/chisel/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala:279: not found: type Annotation
[error] case class Circuit(name: String, components: Seq[Component], annotations: Seq[Annotation] = Seq.empty)
[error]                                                                               ^
[warn] one warning found
[error] 10 errors found
[error] (chiselFrontend/compile:compileIncremental) Compilation failed
[error] Total time: 12 s, completed Feb 8, 2017 10:13:17 PM
@jackkoenig
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Have you tried a publish-local in firrtl?

@donggyukim
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I believe it should work without publish-local?

@jackkoenig
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It should, but we're still in pre-3.0.0 SNAPSHOT phase and things aren't always up to date. @ucbjrl we should probably publish a new snapshot.

@donggyukim
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We should never force chisel users to run publish-local. Otherwise, all projects having chisel as a submodule will be messed up.(This is why I stop using chisel testers) I'm so scared that this can show up again even after we publish a new snapshot. It's also very unfortunate chisel annotations strongly depend on firrtl annotations.

@ucbjrl
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ucbjrl commented Feb 9, 2017 via email

@jackkoenig
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Look at the rocket-chip Makefrag if you want to use chisel3 and firrtl as submodules

@donggyukim
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So, having firrtl as an unmanaged dependency is not working with chisel3? Writing makefile in this ways is too brutal. This brings chaos the projects I'm working on.

@jackkoenig
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@ucbjrl might know the more specific details, but basically sbt does not allow you to override library dependencies with a local subproject. This is a known issue sbt/sbt#2777. The best solution we have come up with is what rocket-chip currently implements.

@shunshou
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shunshou commented Feb 10, 2017 via email

@jackkoenig
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New users don't have to include lots of things, they can just include chisel3 and optionally the chisel-testers if they want those too. Regardless, new uses should use the chisel-template so that they don't have to create their own build.sbt which having to figure out is generally pretty unfriendly for new people.

As for using rocket-chip with different versions of Chisel, I'm not sure but this seems like a good thing to look in to.

@azidar
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azidar commented Feb 22, 2017

This needs to be documented, and snapshots should be publishing more regularly.

@ducky64 ducky64 added this to the 3.0.0 milestone Apr 18, 2017
@azidar azidar modified the milestones: 3.1.0, 3.0.0 Jun 19, 2017
@ducky64 ducky64 modified the milestones: 3.1.0, 3.2.0 Dec 13, 2017
@chick chick modified the milestones: 3.2.0, 3.X Dec 17, 2018
@chick chick changed the title Compile errors with firrtl master Workspace Issues: Compile errors with firrtl master Dec 17, 2018
@chick
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chick commented Dec 17, 2018

Superseded by #556

@chick chick closed this as completed Dec 17, 2018
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