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FE310-based boards: transition from pinmux to pinctrl #44068

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merged 7 commits into from
Mar 24, 2022
Merged

FE310-based boards: transition from pinmux to pinctrl #44068

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357cdfc
drivers: pinctrl: add SiFive pinctrl driver
fkokosinski Mar 22, 2022
edf2cfb
boards: hifive1: add pinctrl configuration for hifive1 board
fkokosinski Mar 22, 2022
b932ece
boards: hifive1_revb: add pinctrl configuration for hifive1_revb board
fkokosinski Mar 22, 2022
d30415b
boards: qemu_riscv32: add pinctrl configuration for qemu_riscv32_xip
fkokosinski Mar 22, 2022
f132c59
boards: FE310-based boards: transition to pinctrl driver
fkokosinski Mar 22, 2022
ed0637c
drivers: pinmux: remove SiFive pinmux driver
fkokosinski Mar 22, 2022
18f66f5
soc: riscv: sifive-freedom: fix SYS_CLOCK_HW_CYCLES_PER_SEC value
fkokosinski Mar 23, 2022
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boards: qemu_riscv32: add pinctrl configuration for qemu_riscv32_xip 
Add pinctrl configuration for future use with the new pinctrl driver.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
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@fkokosinski
fkokosinski committed Mar 23, 2022
commit d30415bfa20d112acb3dd66ecde316b150cf2b54
17 changes: 17 additions & 0 deletions boards/riscv/qemu_riscv32/qemu_riscv32_xip-pinctrl.dtsi
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Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
/*
* Copyright (c) 2022 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <dt-bindings/pinctrl/sifive-pinctrl.h>

&pinctrl {
/* UART0 */
uart0_rx_default: uart0_rx_default {
pinmux = <16 SIFIVE_PINMUX_IOF0>;
};
uart0_tx_default: uart0_tx_default {
pinmux = <17 SIFIVE_PINMUX_IOF0>;
};
};