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Issues list

Introduce Bouffalo Lab SoC's area: GPIO area: Interrupt Controller area: Pinctrl area: Process area: RISCV RISCV Architecture (32-bit & 64-bit) area: Timer Timer area: UART Universal Asynchronous Receiver-Transmitter area: West West utility DNM This PR should not be merged (Do Not Merge) manifest manifest-hal_bouffalolab
#78795 opened Sep 21, 2024 by nandojve Loading… updated Oct 23, 2024 v4.0.0
@gmarull
80
drivers/mfd: it8801: Implement ITE IT8801 mfd drivers area: GPIO area: Input Input Subsystem and Drivers area: MFD area: PWM Pulse Width Modulation area: RISCV RISCV Architecture (32-bit & 64-bit) platform: ITE ITE
#79416 opened Oct 4, 2024 by GTLin08 Loading… updated Oct 23, 2024
@fabiobaltieri
65
drivers: intc: plic: use per-instance spinlock area: Interrupt Controller area: RISCV RISCV Architecture (32-bit & 64-bit)
#80187 opened Oct 22, 2024 by ycsin Loading… updated Oct 23, 2024
@kgugala @tgorochowik @fkokosinski
Add Zephyr RTOS support for WCH CH32V003 area: Clock Control area: Devicetree Binding PR modifies or adds a Device Tree binding area: GPIO area: Interrupt Controller area: Pinctrl area: Process area: RISCV RISCV Architecture (32-bit & 64-bit) area: Timer Timer area: UART Universal Asynchronous Receiver-Transmitter area: West West utility DNM This PR should not be merged (Do Not Merge) manifest manifest-hal_wch
#73761 opened Jun 5, 2024 by kholia Loading… updated Oct 22, 2024
@nordic-krch
281
Add support for nRF54L20 FLPR core area: RISCV RISCV Architecture (32-bit & 64-bit) platform: nRF Nordic nRFx
#79355 opened Oct 3, 2024 by mstasiaknordic • Draft updated Oct 18, 2024
@anangl
Add support for WCH CH56x series SoC area: Architectures area: Clock Control area: Devicetree Binding PR modifies or adds a Device Tree binding area: GPIO area: Interrupt Controller area: Process area: RISCV RISCV Architecture (32-bit & 64-bit) area: Timer Timer area: West West utility
#64472 opened Oct 27, 2023 by xingrz • Draft updated Oct 15, 2024
2 of 3 tasks
@fkokosinski
68
riscv: Introduce T-Head extensions relevant to E serie area: Build System area: RISCV RISCV Architecture (32-bit & 64-bit) area: Toolchains Toolchains
#79004 opened Sep 25, 2024 by VynDragon Loading… updated Oct 1, 2024
@kgugala @tgorochowik @fkokosinski
6
arch: riscv: smp: refactor IPI functions and guard with CONFIG_RISCV_SMP_IPI_CLINT area: RISCV RISCV Architecture (32-bit & 64-bit)
#78493 opened Sep 16, 2024 by ycsin • Draft updated Sep 27, 2024
1 task
@kgugala @tgorochowik @fkokosinski
4
riscv: smp: support IPI via PLIC area: RISCV RISCV Architecture (32-bit & 64-bit) area: SMP Symmetric multiprocessing Enhancement Changes/Updates/Additions to existing features
#78917 opened Sep 24, 2024 by ycsin updated Sep 26, 2024
@kgugala @tgorochowik @fkokosinski
1
arch: riscv: handle interrupt level for CLIC area: Architectures area: RISCV RISCV Architecture (32-bit & 64-bit) platform: GD32 GigaDevice platform: nRF Nordic nRFx
#75581 opened Jul 8, 2024 by jimmyzhe Loading… updated Sep 23, 2024
@kgugala @tgorochowik @fkokosinski
18
arch: riscv: Add support for custom SOC IPI, per-core init area: Kernel area: RISCV RISCV Architecture (32-bit & 64-bit)
#65824 opened Nov 27, 2023 by luchnikov Loading… updated Sep 19, 2024
@fkokosinski
38
Add support for SOPHGO SoCs and Milk-V boards area: Devicetree Binding PR modifies or adds a Device Tree binding area: GPIO area: mbox area: Pinctrl area: Process area: PWM Pulse Width Modulation area: RISCV RISCV Architecture (32-bit & 64-bit) area: Samples Samples area: Timer Timer area: West West utility
#69594 opened Feb 29, 2024 by xingrz Loading… updated Sep 17, 2024
2 tasks done
@fkokosinski
48
How do we support an SoC that mixes ARM and RISCV? area: ARM ARM (32-bit) Architecture area: RISCV RISCV Architecture (32-bit & 64-bit) Enhancement Changes/Updates/Additions to existing features platform: Raspberry Pi Pico Raspberry Pi Pico (RPi Pico)
#78222 opened Sep 10, 2024 by soburi updated Sep 13, 2024
@yonsch
2
boards: canaan: Add initial support for canmv_k230 area: Devicetree Binding PR modifies or adds a Device Tree binding area: Process area: RISCV RISCV Architecture (32-bit & 64-bit)
#74169 opened Jun 12, 2024 by Judehahh Loading… updated Sep 12, 2024
@MaureenHelm
10
soc: neorv32: NEORV32 core updates and new drivers area: Devicetree Binding PR modifies or adds a Device Tree binding area: Interrupt Controller area: RISCV RISCV Architecture (32-bit & 64-bit) area: UART Universal Asynchronous Receiver-Transmitter area: Watchdog Watchdog
#71294 opened Apr 9, 2024 by robhancocksed Loading… updated Sep 9, 2024
@henrikbrixandersen
17
arch: riscv: core: run zephyr completely in user/supervisor mode area: Architectures area: RISCV RISCV Architecture (32-bit & 64-bit) area: Timer Timer area: UART Universal Asynchronous Receiver-Transmitter platform: nRF Nordic nRFx
#76682 opened Aug 5, 2024 by tswaehn Loading… updated Sep 6, 2024
1
@kgugala @tgorochowik @fkokosinski
75
[RISCV] running zephyr scheduler in user-/supervisor mode (instead of machine mode)? area: Kernel area: RISCV RISCV Architecture (32-bit & 64-bit) Feature Request A request for a new feature
#68133 opened Jan 25, 2024 by tswaehn updated Sep 3, 2024
1
23
Don't use --whole-archive for libc/common and libc/picolibc files area: Build System area: C Library C Standard Library area: Kernel area: Networking area: RISCV RISCV Architecture (32-bit & 64-bit) area: Samples Samples area: Testsuite Testsuite area: Toolchains Toolchains area: Userspace Userspace area: Wi-Fi Wi-Fi manifest manifest-picolibc platform: ESP32 Espressif ESP32 platform: X86 x86 and x86-64
#65434 opened Nov 18, 2023 by keith-packard Loading… updated Aug 25, 2024
@tejlmand @stephanosio
79
riscv: multi-lib: lack of rv64imafdc_zicsr_zifencei_zba_zbb_zbc_zbs/lp64d/medany configuration area: RISCV RISCV Architecture (32-bit & 64-bit) Enhancement Changes/Updates/Additions to existing features
#74256 opened Jun 13, 2024 by amr-sc updated Jun 18, 2024
@kgugala @tgorochowik @fkokosinski
IRQ locking during exceptions isn't consistent area: Exception Handling area: NIOS2 NIOS2 Architecture area: RISCV RISCV Architecture (32-bit & 64-bit) area: X86 x86 Architecture (32-bit) area: X86_64 x86-64 Architecture (64-bit) area: Xtensa Xtensa Architecture Enhancement Changes/Updates/Additions to existing features
#21923 opened Jan 14, 2020 by andrewboie updated Feb 12, 2024
@nashif @jhedberg
@kgugala @tgorochowik @fkokosinski @dcpleung
9
RISC-V mode supervisor execution area: RISCV RISCV Architecture (32-bit & 64-bit) Feature Request A request for a new feature
#52806 opened Dec 5, 2022 by josecm updated Feb 12, 2024
@npitre
3
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