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Add support for NoC based interconnect with Constellation #1224

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merged 4 commits into from
Sep 28, 2022

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jerryz123
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@jerryz123 jerryz123 commented Sep 22, 2022

Added support for NoC-based interconnect via Constellation.

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

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  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
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  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
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# Constellation can run without espresso, but this improves
# elaboration time drastically
pushd $REMOTE_CHIPYARD_DIR/generators/constellation
scripts/install-espresso.sh $RISCV
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What is espresso? Is this like graalvm?

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https://github.com/chipsalliance/espresso .

Espresso is a logic minimizer that Constellation calls (through chisel3) to generate routing tables.
If espresso is not installed, the generator falls back on a slower implementation.

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I'm inclined to just add this installation in build-toolchains-extra.sh and add a flag to skip this if users don't want it.

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I'm going to leave it in like this for now, to avoid more churn on the install scripts.

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Sure. Can you make an issue so this is noted and we can put it into the next release? I get the feeling that majority of people won't have this installed and will complain about slowness

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Sure, I added an issue. There has been discussion of packaging espresso as a Scala library so it can just be added as a SBT dependency to Chisel, but I don't think there's been any progress on that.

Also, the performance improvement is only apparent for large many core designs, which are still slow to elaborate due to the cost of elaborating many cores.

@jerryz123 jerryz123 force-pushed the constellation-integrate branch 5 times, most recently from ae534f2 to 746d28a Compare September 26, 2022 18:34
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This also adds a new TutorialNoCConfig. This is ready for merge now.

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LGTM! good stuff!

@jerryz123 jerryz123 merged commit b192a12 into main Sep 28, 2022
@jerryz123 jerryz123 deleted the constellation-integrate branch September 28, 2022 18:05
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Quick review without viewing the docs. I'll trust Sagar on the docs front.

new constellation.soc.WithSbusNoC(constellation.protocol.TLNoCParams(
constellation.protocol.DiplomaticNetworkNodeMapping(
inNodeMapping = ListMap(
"Core 0" -> 1, "Core 1" -> 2, "Core 2" -> 4 , "Core 3" -> 7,
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How are these strings determined?

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Currently its ad-hoc based on how the TL agents are diplomatically instantiated, whether or not an explicit name is provided.
This is admittedly very messy currently, the names often do not reflect what the device is.

This should be cleaned up in the future.

@@ -23,7 +23,7 @@ class TinyRocketConfig extends Config(

// DOC include start: FFTRocketConfig
class FFTRocketConfig extends Config(
new fftgenerator.WithFFTGenerator(baseAddr=0x2000, numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at 0x2000 with 16bit fixed-point numbers.
new fftgenerator.WithFFTGenerator(numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at 0x2000 with 16bit fixed-point numbers.
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Comment needs to be updated. However, why was this address removed in favor of it being @ 0x2400?

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Making all the MMIO devices use different addresses makes it easier to generate and test 1 config that contains many devices.

I updated the SW tests as well for these.

@@ -13,7 +13,7 @@ import freechips.rocketchip.util.UIntIsOneOf

// DOC include start: GCD params
case class GCDParams(
address: BigInt = 0x2000,
address: BigInt = 0x1000,
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Again, why is this address moved?

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I guess you can comment on this for all other MMIO addresses moving?

MODEL ?= TestHarness
VLOG_MODEL ?= TestHarness
MODEL_PACKAGE ?= constellation.test
CONFIG ?= TestConfig00
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00?

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As opposed to TestConfig01, TestConfig02, etc.

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3 participants