Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
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Updated
Jun 11, 2025 - Verilog
Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
A collection of free educational materials, most of which are interactive or 3D animated. (See README below). You may find inspiration for measurement techniques here. They may improve your comprehension of STEM topics & even writing.
Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)
RISC-V ASIC design reference
Rule110 Cellular Automata ASIC for Tiny Tapeout 05
This repository documents my journey in the RISC-V Reference SoC Tapeout Program. The first 10 weeks focus on RTL design, synthesis, simulation, and verification using open-source tools like Yosys, Icarus Verilog, GTKWave, and OpenLane, building a foundation for full-chip tapeout.
A Wavy and Rainbowy Single-Tile Submission to the TT08 Demoscene Competition
Final Project for Digital Integrated Circuits. SoupVenture Chip.
VGA flexible video adapter for TinyQV - Crowdsourced Risc-V SoC
VGA flexible video adapter for TinyQV - Crowdsourced Risc-V SoC
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