Quartus II, MX6Q를 사용한 HDL 학습

CWRU's Logic Lab

Learning Verilog, Quartus & FPGA. DA CS 603

Icy Tower FPGA Cyclone III Game

Verilog Implementation of the LC-3 Processor. DA CS 603

Prácticas de la asignatura de Desarrollo de Hardware Digital en la UGR

2019年UPC应用物理专业《数字电子技术课程设计》任务内容：数字时钟设计

Quartus II Pipelined Processor

DEUARC RISC computer design in Quartus II 13.0

Projeto de uma ULA feito em Quartus II para a disciplina de Sistemas Digitais (2019.1)

FIR filter for Altera DE0 EP3C16F484C6N Created on top of SURF VHDL FIR Filter

Implementações feitas em VHDL nas disciplinas de Circuitos Digitais I, Circuitos Digitais II e Sistemas Digitais Avançados

Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.

The player needs to click on the square with a computer mouse before it disappears. The score is shown on the seven-segment FPGA board display.

Bizzas CPU design

Logic Design.

A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.

Diferentes multiplicadores implementados em hardware.

Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.