quartus2
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2019年UPC应用物理专业《数字电子技术课程设计》任务内容:数字时钟设计
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Jul 2, 2019 - Verilog
Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II
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Jun 10, 2024 - C
Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.
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Sep 7, 2021 - VHDL
Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL
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Aug 24, 2025 - VHDL
Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.
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Feb 7, 2023 - VHDL
Lightweight adventure game inspired by the classic Pokémon series, adapted to run on the DE2i-150 FPGA board.
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Aug 14, 2025 - Verilog
The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform
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May 28, 2024 - Verilog
Logic Design.
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Apr 16, 2022 - VHDL
DEUARC RISC computer design in Quartus II 13.0
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Feb 23, 2020 - VHDL
This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.
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Aug 28, 2024 - Verilog
A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.
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Jun 22, 2022 - HTML
Objetivo do Projeto Implementação de circuitos digitais em FPGA. Exemplos de lógica combinacional, sequencial e sistemas embarcados. Testes práticos com periféricos (LEDs, botões, displays, etc.).
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Jul 11, 2025 - VHDL
Subida del fichero TCL asociado al pineado de la placa CYC1000, Con sus múltiples variantes recogidas en un fichero de texto.
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Dec 11, 2023
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