OPAE porting to Xilinx FPGA devices.
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Updated
Aug 5, 2020 - Coq
OPAE porting to Xilinx FPGA devices.
Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs
HLS-based Xilinx ICAP3 Controller (tested with VCU108)
some reusable scripts
A set of Vivado dev resources.
Tools for automating the Vivado project partial reconfiguration flow
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