nexys-video
Here are 12 public repositories matching this topic...
A ZipCPU SoC for the Nexys Video board supporting video functionality
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Nov 13, 2024 - Verilog
A 5-stage pipelined RV32IMF RISC-V SoC optimized for FPGA (Nexys Video/4-DDR). Features a custom IEEE-754 FPU, interrupt-driven UART, and various peripherals.
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Mar 17, 2026 - C
VeeRwolf (a platform for the VeeR family of RISC-V cores) for Nexys Video Board: https://github.com/chipsalliance/VeeRwolf
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Sep 4, 2023 - Verilog
A guide on how to write basic FPGA programming in VHDL and its implementation. This targeted the one who has no experience with Vivado.
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Oct 30, 2024 - Tcl
Hybrid FPGA-CNN-GRU autonomous-driving perception with W8A8 Verilog CNN feature extraction, FPGA-native streaming dataflow, four-frame temporal buffering, and 353.93x FPGA acceleration at 50 MHz.
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Aug 19, 2026 - Verilog
Nexys Video FPGA sensor-fusion HUD integrating Pcam 5C camera input, sonar acquisition, CDC-safe telemetry snapshots, HDMI compositing, OLED telemetry, and debug outputs.
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Jul 4, 2026 - Verilog
Verilog FPGA and Jetson Orin renewable-energy systems: solar tracking, BESS telemetry, CRC/QPSK/OFDM processing, and live monitoring.
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Aug 11, 2026 - Python
Sudoku Solver using the Nexys Video board
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Jan 23, 2020 - Coq
Predict future robot states and task progress using a video-generative value model to improve reinforcement learning performance.
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Sep 7, 2026
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