This project demonstrates DSP capabilities of Terasic DE2-115

Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. See the video. Pure Verilog. (No soft-core processor.)

FPGA paramatized mandelbrot generator. I have tested instantiating 4, 8, and 12 calculating engines. It has a built-in VGA controller (at 640x480) with internal dual-port RAM as the frame buffer. With 4 engines it runs at 100 MHz (5 frames/sec). With 12 engines, at 112 MHz, it hits 20.5 frames/sec.

Simple LED blink example for DE2-115

Design for board DE2-115, microprocessor soft running a uCOS-II(Real Time Operating System). Application to test is a Lift program

FPGA_TETRIS

This project is an implementation of a special-purpose processor that can calculate greatest common multiple (GCM) and least common factor (LCM) for two inputs based on input operation code (Opcode)

RV32IM System-on-Chip (SoC)

FPGA VGA to run FlappyBird

An implementation of a simple 8-bit microprocessor on an Altera DE2-115 board for UNLV CpE 300L Digital Systems Architecture and Design final project.

The repository contains the source files regarding an ALU design and FPGA implimentation Project.

Video streaming from a camera to a 58x24 pixel flipdot display. See the two flipdot_display*.mp4 videos. All processing in Verilog RTL (no softcore uP).

Rip off of space invaders coded in Verilog with VGA output support, intended for DE2-115 FPGA board. Final project for CSCB58.

A platformer game based on Gravity Guy, using a DE2 hardware board

Patched Altera USB DEVICE example with windows 10 drivers