[GlobalISel] Revise 'assignCustomValue' interface

[darkbuck]

• Previously, 'assignCustomValue' requests the number of assigned VAs minus 1 is returned and treats 0 as the assignment failure. However, under that arrangment, we cannot tell a successful single VA custom assignment from the failure case.
• This change requests that 'assignCustomValue' just return the number of all VAs assigned, including the first WA so that it won't be ambigous to tell the failure case from the single VA custom assignment.

[llvmbot]

@llvm/pr-subscribers-backend-arm
@llvm/pr-subscribers-llvm-globalisel

@llvm/pr-subscribers-backend-risc-v

Author: None (darkbuck)

Changes

• Previously, 'assignCustomValue' requests the number of assigned VAs minus 1 is returned and treats 0 as the assignment failure. However, under that arrangment, we cannot tell a successful single VA custom assignment from the failure case.
• This change requests that 'assignCustomValue' just return the number of all VAs assigned, including the first WA so that it won't be ambigous to tell the failure case from the single VA custom assignment.

---

Full diff: https://github.com/llvm/llvm-project/pull/77824.diff

5 Files Affected:

• (modified) llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h (+2-2)
• (modified) llvm/lib/CodeGen/GlobalISel/CallLowering.cpp (+1-1)
• (modified) llvm/lib/Target/ARM/ARMCallLowering.cpp (+3-3)
• (modified) llvm/lib/Target/Mips/MipsCallLowering.cpp (+1-1)
• (modified) llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp (+3-3)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
index ec0b3363f51694..d123ab7d8e46ed 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
@@ -291,8 +291,8 @@ class CallLowering {
     /// \p If the handler wants the assignments to be delayed until after
     /// mem loc assignments, then it sets \p Thunk to the thunk to do the
     /// assignment.
-    /// \return The number of \p VAs that have been assigned after the first
-    ///         one, and which should therefore be skipped from further
+    /// \return The number of \p VAs that have been assigned including the
+    ///         first one, and which should therefore be skipped from further
     ///         processing.
     virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs,
                                        std::function<void()> *Thunk = nullptr) {
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index 6858e030c2c75e..2953433deff1f0 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -694,7 +694,7 @@ bool CallLowering::handleAssignments(ValueHandler &Handler,
         DelayedOutgoingRegAssignments.emplace_back(Thunk);
       if (!NumArgRegs)
         return false;
-      j += NumArgRegs;
+      j += (NumArgRegs - 1);
       continue;
     }
 
diff --git a/llvm/lib/Target/ARM/ARMCallLowering.cpp b/llvm/lib/Target/ARM/ARMCallLowering.cpp
index f9d9930cec6d06..38faf5c295aeeb 100644
--- a/llvm/lib/Target/ARM/ARMCallLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMCallLowering.cpp
@@ -166,11 +166,11 @@ struct ARMOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
         assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
         assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
       };
-      return 1;
+      return 2;
     }
     assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
     assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
-    return 1;
+    return 2;
   }
 
   MachineInstrBuilder MIB;
@@ -341,7 +341,7 @@ struct ARMIncomingValueHandler : public CallLowering::IncomingValueHandler {
 
     MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs);
 
-    return 1;
+    return 2;
   }
 
   /// Marking a physical register as used is different between formal
diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp
index 1cd360fe30f8eb..b8562902112775 100644
--- a/llvm/lib/Target/Mips/MipsCallLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp
@@ -185,7 +185,7 @@ MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg,
 
   markPhysRegUsed(VALo.getLocReg());
   markPhysRegUsed(VAHi.getLocReg());
-  return 1;
+  return 2;
 }
 
 namespace {
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
index 697ad476ff8c91..5a81c5c7c9f27f 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
@@ -146,11 +146,11 @@ struct RISCVOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
 
     if (Thunk) {
       *Thunk = assignFunc;
-      return 1;
+      return 2;
     }
 
     assignFunc();
-    return 1;
+    return 2;
   }
 
 private:
@@ -266,7 +266,7 @@ struct RISCVIncomingValueHandler : public CallLowering::IncomingValueHandler {
 
     MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs);
 
-    return 1;
+    return 2;
   }
 
   /// How the physical register gets marked varies between formal

[darkbuck]

No new tests are added as the existing regression tests cover that change. All regression tests from touched targets passed. However, out-of-tree targets may need adjusting accordingly.