firtool-1.80.0
seldridge
released this
02 Aug 18:00
·
447 commits
to main
since this release
What's Changed
- [ESI Runtime] Port connect: add optional buffer size arg by @teqdruid in #7387
- [LLHD] Add TemporalCodeMotionPass by @maerhart in #7381
- [ImportVerilog] Support large integer constants by @fabianschuiki in #7391
- [ImportVerilog] Support for loop variables by @fabianschuiki in #7393
- [ImportVerilog] Support the power operator by @fabianschuiki in #7395
- [MooreToCore][NFC] Fix the visibility of hw.module. by @hailongSun2000 in #7396
- [FIRRTL] Touchup {parse,emit}-basic.fir for
--parse-only
. by @dtzSiFive in #7397 - [ESI Runtime] Distribute headers along with wheel by @teqdruid in #7400
- [Verif] Introduce Formal Contracts by @dobios in #7325
- [PrepareForEmission] Hoist registers in a procedural region with
disallowLocalVariables
by @uenoku in #7404 - [Moore] Clean up struct ops and add missing tests by @fabianschuiki in #7392
- [Scheduling] Replace macro use in problem definitions by @jopperm in #7320
- [FIRRTL] default layer specialization by @youngar in #7401
- [ImportVerilog] Support for String Types, String Literals by @wenhu1024 in #7403
- [ESI] MMIO: add read/write port to service by @teqdruid in #7407
- Support
scf.if
Op Lowering to Calyx by @jiahanxie353 in #6256 - [OM] Pass Python values back and forth, not Attributes. by @mikeurbach in #7417
- [docs] Remove confusing reset in Seq docs SV example by @TaoBi22 in #7419
- [FIRRTL][Dedup] Rework hashing for perf and bug fixes. by @dtzSiFive in #7420
New Contributors
- @wenhu1024 made their first contribution in #7403
- @jiahanxie353 made their first contribution in #6256
Full Changelog: firtool-1.79.0...firtool-1.80.0