[SYCL][FPGA] Prepare future implementation of experimental pipe properties #5886
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…rties Add a template parameter to pass compile-time constant properties to sycl::ext::intel::experimental::pipe, and redeclare pipe implementation as a specialization when the properties list is empty; otherwise, when the properties list is non-empty, throw a descriptive compiler error. The unnamed template parameter allows implementation of the case where the properties list is non-empty in a downstream, FPGA-specific header, before finalizing pipe properties for inclusion into this header. See draft specification in #5838
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Same unrelated test failures as outlined in #5766 (comment). |
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Hi @intel/llvm-reviewers-runtime, since @cperkinsintel is unavailable for review, it would be great if you could take over the review in time for the next release. |
sherry-yuan
reviewed
Mar 25, 2022
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@intel/llvm-reviewers-runtime could you take a quick look to ensure this gets in before code complete? |
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Thanks @s-kanaev and @steffenlarsen for the quick review 🙂 @intel/llvm-gatekeepers could you merge in time for code complete? |
bader
changed the title
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@intel/dpcpp-esimd-reviewers, FYI. 4 failing tests are failing on ESIMD emulator - https://github.com/intel/llvm/runs/5685843530?check_suite_focus=true. I don't think these failures are related to this PR, so I'm going to merge it. |
alexbatashev
added a commit
to alexbatashev/llvm
that referenced
this pull request
Apr 2, 2022
* sycl: (3343 commits) [SYCL][L0] Disable round-robin submissions to multiple CCSs (intel#5945) [SYCL][CUDA] Don't link pi_cuda against libsycl (intel#5908) [CI] Disable -Werror by default (intel#5889) [BuildBot] Uplift CPU/FPGAEMU RT version to 2022.13.3.0.16 (intel#5883) [SYCL][CUDA][libclc] Add support for atomic fp exchange and compare exchange (intel#5937) [SYCL] Fix device code outlining for static local variables (intel#5915) [SYCL][NFC] Refactor plugin CMakeLists.txt (intel#5799) [SPIR-V][Doc] Add JointMatrixWorkItemLengthINTEL instruction to joint matrix extension (intel#5781) [SYCL] Expand device_global map and make initialization order agnostic (intel#5902) [SYCL][CUDA] Add IPSCCP pass to O0 by default (intel#5900) [ESIMD] Disable ABI changes warnings in host compiler. (intel#5931) [SYCL] Make properties constructor constexpr (intel#5928) [NFC][SYCL] Fix static analysis warning (intel#5933) [CODEOWNERS][NFC] Assign code owners for CI scripts (intel#5873) [SYCL] Store the kernel object size in the integration header (intel#5862) [SYCL][ESIMD] Change esimd-verifier logic for detecting valid SYCL calls (intel#5914) [SYCL][CUDA][DOC] GettingStartedGuide.md to recommend cuda 11.6 (intel#5917) [SYCL][L0] Move command list cache usage under mutex (intel#5874) [SYCL][FPGA] Prepare future implementation of experimental pipe properties (intel#5886) [CI] Roll back intel driver to the latest version (intel#5925) ...
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Add a template parameter to pass compile-time constant properties to
sycl::ext::intel::experimental::pipe, and redeclare pipe implementation
as a specialization when the properties list is empty; otherwise, when
the properties list is non-empty, throw a descriptive compiler error.
The unnamed template parameter allows implementation of the case where
the properties list is non-empty in a downstream, FPGA-specific header,
before finalizing pipe properties for inclusion into this header.
See draft specification in #5839
@GarveyJoe @rho180 @sherry-yuan @bsyrowik @tiwaria1 @ajaykumarkannan