arch: arm: cortex_a_r: Fix linker script

[mausys]

This commit fixes overlapping MMU regions. If ROM_ADDR equals RAM_ADDR, the current output location counter will not be resetted, so the _image_ram range doesn't include the __text_region range.

[github-actions]

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[ithinuel]

Thank you for your contribution. I think it would be valuable to try to keep this file aligned with its aarch64 variant.

@carlocaione I see this is not conditioned in aarch64 either.
Do you have any recommendation on this matter ?

[carlocaione]

@mausys please fix the CI errors. Also, can you give a reproducer for the problem you are seeing?

[mausys]

You can check the generated .map file for a non-XIP project (my target is a zynq 7000). The value of the variable _image_ram_start is less than that of _text_region_start, while _image_ram_end is greater than __text_region_end. That means, that _image_ram includes the __text_region. All those variables are used in arm_mmu.c to create the page table entries. I'm not sure what happens when multiple page table entries exist for a page. But the code segment might become writable, what could be a security issue. Anyway it creates unnecessary page table entries.

[mausys]

I analyzed the arm_mmu.c again and as far as I understand, maybe no duplicate entries are created and instead the code segment overwrites the wrong data segment entries. But this is confusing.

[ithinuel]

@carlocaione Does @mausys’s replies answer your question?

[kartben]

@carlocaione Does @mausys’s replies answer your question?

@carlocaione ping? :)

[wearyzen]

adding "fix" in commit title helps identify fixes and instead of "like e102e37690a" could you add some more comments?
Here is a rough draft of what I think could be added instead for both commits:

arch: arm: cortex_m: fix text region overlap with ram in !XIP

ROM_ADDR and RAM_ADDR is same when CONFIG_XIP is not defined.
If we reset the location for RAMABLE region to RAM_ADDR text region,
which is part of rom, overlaps with initial ram region.
This commit tries to avoid this incorrect behaviour for cortex_m

[kartben]

@ithinuel has your request for change been addressed properly? If yes, please revisit your -1, thanks!

[wearyzen]

@mausys, sorry for the oversight, could you please remove my name from the commit message as a co-author? I don't think adding review comments always counts for co-authorship. Appreciate your help!

[kartben]

Hi @mausys @ithinuel @wearyzen
This seems to be causing a CI failure in main (https://github.com/zephyrproject-rtos/zephyr/actions/runs/14185617769/job/39740279567) -- could you please look into it?

west twister -p qemu_cortex_a9/xc7z007s -s cpp.libcxx.glibcxx.picolibc --no-detailed-test-id


ERROR   - *** Booting Zephyr OS build v4.1.0-1600-g2eb8cfb7f508 ***
Running TESTSUITE libcxx_tests
===================================================================
version 201703
START - test_array
 PASS - test_array in 0.001 seconds
===================================================================
START - test_exception
E: ***** DATA ABORT *****
E: Unknown (7)
E: r0/a1:  0x0010c264  r1/a2:  0x00000047  r2/a3:  0x0010ada5
E: r3/a4:  0x00000048 r12/ip:  0x001bb9b0 r14/lr:  0x00101285
E:  xpsr:  0x2000013f
E: Faulting instruction address (r15/pc): 0x00101248
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x128000 (test_exception)
E: Halting system

[wearyzen]

@kartben , #87965 should fix the ci