drivers: clock_control: stm32h7: disable PLLs before configuration and guard for XIP #75655
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Disable every PLL before configuration. That allows an application to reconfigure PLLs after a bootloader configuration. Don't disable the PLL clock if it is used by (Q|O)SPI when executing from external memory. That will lead to a stall. Note: when (Q|O)SPI runs from PLL, the bootloader dictates the clock configuration. There is no clock reconfiguration support for memory map mode in (Q|O)SPI drivers. Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
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| @@ -766,7 +766,36 @@ static int set_up_plls(void) | |||
| stm32_clock_switch_to_hsi(); | |||
| LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); | |||
| } | |||
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| #if defined(CONFIG_STM32_MEMMAP) && defined(CONFIG_BOOTLOADER_MCUBOOT) | |||
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Non blocking: I wonder about the use of CONFIG_BOOTLOADER_MCUBOOT which restricts usage of this code to MCUBoot while code should be compatible with any other bootloader.
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Agree, using CONFIG_BOOTLOADER_MCUBOOT to differentiate if the app runs by a bootloader is not very clean. That seems to be the only differentiation way as of now. The CONFIG_STM32_MEMMAP is set for both (bootloader and the application). Currently, there is only one supported bootloader.
Maybe it is worth introducing a more generic config? Something agnostic, like CONFIG_CHAINLOADED that could be y by default for BOOTLOADER_MCUBOOT?
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Maybe it is worth introducing a more generic config? Something agnostic, like CONFIG_CHAINLOADED that could be y by default for BOOTLOADER_MCUBOOT
Indeed, I wonder why this isn't already available
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Extends #57337 to disable every PLL before configuration.
That allows an application to reconfigure PLLs after being configured by a bootloader.
At the same time, always disable PLLs to allow the bootloader to configure them after a restart.
However, we don't want to disable the PLL clock if it is used by (Q|O)SPI when
executing from external memory.
Fixes #75653 in a non-invasive way.
Overall. it is possible to implement complete clock reconfiguration of the
(Q|O)SPI when it runs from PLL(1|2) in XIP.
The RM0468 states that RCC
OCTOSPISELcan be modified on the fly/at runtime.However, there are other open questions. Will (Q|O)SPI configured for PLL (by a bootloader)
work with external memory in all cases with reduced frequency (when switched to HCLK for some time)?
Moreover, the drivers will need to reconfigure the peripheral. For example, the prescaler requires
aborting memory map mode during execution from it. That and other aspects (sfdp read) will require
some refactoring.