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@danieldegrasse danieldegrasse commented Aug 17, 2023

The iMX RT bootrom allows the user to transparently load images into
RAM regions from flash at boot time by providing a correctly configured
boot header. In particular, if the boot header contains a load address within
RAM, the bootroom will automatically copy the image to the load address
before executing it.

Introduce CONFIG_NXP_IMX_RT_ROM_RAMLOADER to enable this feature. This
Kconfig will shift the LMA of a image built to run in a RAM region to
reside in the default FlexSPI boot region, which allows the image to be
loaded to the FlexSPI region using west. This is intended to simplify
development of applications executing from RAM on iMX RT based systems.

Signed-off-by: Daniel DeGrasse daniel.degrasse@nxp.com

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@galak, This PR is indented as an alternative to #55288. Since this feature would primarily be used to boot from FlexSPI within Zephyr (although the ROM bootloader does support additional boot sources), and the change here is primarily a software option, I enabled the functionality using an SOC specific Kconfig setting.

The iMX RT bootrom allows the user to load images into RAM regions from
flash by providing a correctly configured boot header. In particular, if
the boot header contains a load address within RAM, the bootroom will
automatically copy the image to the load address before executing it

Introduce CONFIG_NXP_IMX_RT_ROM_RAMLOADER to enable this feature. This
Kconfig will shift the LMA of a image built to run in a RAM region to
reside in the default FlexSPI boot region, which allows the image to be
loaded to the FlexSPI region using west. This is intended to simplify
development of applications executing from RAM on iMX RT based systems.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SRAM code region definition to RT5xx series SOC. The RT5xx shares
SRAM partitions between the code and data bus, but a default allocation
is chosen by the SOC level devicetree. The user can modify this
allocation by changing the base address and size of the sram_code and
sram0 regions in their board devicetree.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SRAM code region definition to RT6xx series SOC. The RT6xx shares
SRAM partitions between the code and data bus, but a default allocation
is chosen by the SOC level devicetree. The user can modify this
allocation by changing the base address and size of the sram_code and
sram0 regions in their board devicetree.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
@danieldegrasse danieldegrasse requested a review from galak August 28, 2023 18:42
@MaureenHelm MaureenHelm self-requested a review September 14, 2023 15:53
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@MaureenHelm MaureenHelm left a comment

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I think this addresses @galak's concern in #55288

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@DerekSnell DerekSnell left a comment

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Very helpful! Thank you, @danieldegrasse

@MaureenHelm MaureenHelm merged commit b0b32c5 into zephyrproject-rtos:main Sep 15, 2023
@danieldegrasse danieldegrasse deleted the feature/rt-rom-bootloader branch September 20, 2023 21:03
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5 participants