boards: arm: gigadevice: Initial support for gd32f470ik

boards/arm/gd32f470i_eval/Kconfig.board

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+# Copyright (c) 2022, Rtone.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_GD32F470I_EVAL
+	bool "GigaDevice GD32F470I-EVAL"
+	depends on SOC_GD32F470

boards/arm/gd32f470i_eval/Kconfig.defconfig

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+# Copyright (c) 2022, Rtone.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_GD32F470I_EVAL
+
+config BOARD
+	default "gd32f470i_eval"
+
+endif # BOARD_GD32F470I_EVAL

boards/arm/gd32f470i_eval/board.cmake

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+# Copyright (c) 2022, Rtone.
+# SPDX-License-Identifier: Apache-2.0
+
+# GD32F470xx series is not yet supported by SEGGER J-Link
+board_runner_args(jlink "--device=GD32F450IK" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/gd32f470i_eval/doc/index.rst

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+.. _gd32f470i_eval:
+
+GigaDevice GD32F470I-EVAL
+#########################
+
+Overview
+********
+
+The GD32F470I-EVAL board is a hardware platform that enables prototyping
+on GD32F470IK Cortex-M4F Stretch Performance MCU.
+
+The GD32F470IK features a single-core ARM Cortex-M4F MCU which can run up
+to 240 MHz with flash accesses zero wait states, 3072kiB of Flash, 256kiB of
+SRAM and 140 GPIOs.
+
+.. image:: img/gd32f470i_eval.png
+     :align: center
+     :alt: gd32f470i_eval
+
+
+Hardware
+********
+
+- GD32F470IKH6 MCU
+- 2Kb EEPROM
+- 16Mbit SPI and QSPI NOR Flash
+- 256Mbit SDRAM
+- 3 x User LEDs
+- 3 x User Push buttons
+- 1 x USART (RS-232 at J1 connector)
+- 1 x POT connected to an ADC input
+- Headphone interface
+- Micro SD Card Interface
+- USB FS connector
+- USB HS connector
+- 1 x CAN
+- Ethernet Interface
+- 4.3" LCD (480x272)
+- OV2640 Digital Camera
+- GD-Link on board programmer
+- J-Link/JTAG connector
+
+For more information about the GD32F470 SoC and GD32F470I-EVAL board:
+
+- `GigaDevice Cortex-M4F Stretch Performance SoC Website`_
+- `GD32F470IKH6 Specifications`_
+- `GD32F470xx Datasheet`_
+- `GD32F4xx User Manual`_
+
+Supported Features
+==================
+
+The board configuration supports the following hardware features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - EXTI
+     - :kconfig:option:`CONFIG_GD32_EXTI`
+     - :dtcompatible:`gd,gd32-exti`
+   * - GPIO
+     - :kconfig:option:`CONFIG_GPIO`
+     - :dtcompatible:`gd,gd32-gpio`
+   * - NVIC
+     - N/A
+     - :dtcompatible:`arm,v7m-nvic`
+   * - PWM
+     - :kconfig:option:`CONFIG_PWM`
+     - :dtcompatible:`gd,gd32-pwm`
+   * - SYSTICK
+     - N/A
+     - N/A
+   * - USART
+     - :kconfig:option:`CONFIG_SERIAL`
+     - :dtcompatible:`gd,gd32-usart`
+   * - DAC
+     - :kconfig:option:`CONFIG_DAC`
+     - :dtcompatible:`gd,gd32-dac`
+   * - I2C
+     - :kconfig:option:`CONFIG_I2C`
+     - :dtcompatible:`gd,gd32-i2c`
+   * - EEPROM
+     - :kconfig:option:`CONFIG_EEPROM`
+     - :dtcompatible:`atmel,at24`
+   * - SPI
+     - :kconfig:option:`CONFIG_SPI`
+     - :dtcompatible:`gd,gd32-spi`
+
+Serial Port
+===========
+
+The GD32F470I-EVAL board has one serial communication port. The default port
+is USART0 with TX connected at PA9 and RX at PA10.
+
+Programming and Debugging
+*************************
+
+Before programming your board make sure to configure boot and serial jumpers
+as follows:
+
+- J2/3: Select 2-3 for both (boot from user memory)
+- J5: Select 1-2 position (labeled as ``USART0``)
+
+Using GD-Link
+=============
+
+The GD32F470I-EVAL includes an onboard programmer/debugger (GD-Link) which
+allows flash programming and debugging over USB. There is also a JTAG header
+(J1) which can be used with tools like Segger J-Link.
+
+#. Build the Zephyr kernel and the :ref:`hello_world` sample application:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f470i_eval
+      :goals: build
+      :compact:
+
+#. Run your favorite terminal program to listen for output. On Linux the
+   terminal should be something like ``/dev/ttyUSB0``. For example:
+
+   .. code-block:: console
+
+      minicom -D /dev/ttyUSB0 -o
+
+   The -o option tells minicom not to send the modem initialization
+   string. Connection should be configured as follows:
+
+      - Speed: 115200
+      - Data: 8 bits
+      - Parity: None
+      - Stop bits: 1
+
+#. To flash an image:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f470i_eval
+      :goals: flash
+      :compact:
+
+   You should see "Hello World! gd32f470i_eval" in your terminal.
+
+#. To debug an image:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f470i_eval
+      :goals: debug
+      :compact:
+
+
+.. _GigaDevice Cortex-M4F Stretch Performance SoC Website:
+   https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m4/stretch-performance-line/gd32f470-series/
+
+.. _GD32F470IKH6 Specifications:
+   https://www.gigadevice.com/microcontroller/gd32f470ikh6/
+
+.. _GD32F470xx Datasheet:
+   https://gd32mcu.21ic.com/data/documents/shujushouce/GD32F470xx_Datasheet_Rev1.1.pdf
+
+.. _GD32F4xx User Manual:
+   https://www.gd32mcu.com/data/documents/yingyongbiji/GD32F4xx_User_Manual_Rev2.6.pdf

boards/arm/gd32f470i_eval/gd32f470i_eval-pinctrl.dtsi

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+/*
+ * Copyright (c) 2022, Rtone.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/gd32f470i(g-i-k)xx-pinctrl.h>
+
+&pinctrl {
+	usart0_default: usart0_default {
+		group1 {
+			pinmux = <USART0_TX_PA9>, <USART0_RX_PA10>;
+		};
+	};
+
+	dac_default: dac_default {
+		group1 {
+			pinmux = <DAC_OUT0_PA4>;
+		};
+	};
+
+	pwm1_default: pwm1_default {
+		group1 {
+			pinmux = <TIMER1_CH2_PB10>;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SCL_PB6>, <I2C0_SDA_PB7>;
+			drive-open-drain;
+		};
+	};
+
+	spi5_default: spi5_default {
+		group1 {
+			pinmux = <SPI5_SCK_PG13>, <SPI5_MOSI_PG14>,
+				 <SPI5_MISO_PG12>,
+				 /* Use pinmux to pullup pg10 and pg11. */
+				 <SPI5_IO2_PG10>, <SPI5_IO3_PG11>;
+		};
+	};
+};

boards/arm/gd32f470i_eval/gd32f470i_eval.dts

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+/*
+ * Copyright (c) 2022, Rtone.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <gigadevice/gd32f4xx/gd32f470ik.dtsi>
+#include "gd32f470i_eval-pinctrl.dtsi"
+
+/ {
+	model = "GigaDevice GD32F470I-EVAL";
+	compatible = "gd,gd32f470i-eval";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &usart0;
+		zephyr,shell-uart = &usart0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1: led1 {
+			gpios = <&gpioe 2 GPIO_ACTIVE_HIGH>;
+			label = "LED1";
+		};
+		led2: led2 {
+			gpios = <&gpioe 3 GPIO_ACTIVE_HIGH>;
+			label = "LED2";
+		};
+		led3: led3 {
+			gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>;
+			label = "LED3";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		wakeup_key: wakeup_key {
+			label = "WAKEUP_KEY";
+			gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
+		};
+		tamper_key: tamper_key {
+			label = "TAMPER_KEY";
+			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
+		};
+		user_key: user_key {
+			label = "USER_KEY";
+			gpios = <&gpiob 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+
+		/* NOTE: bridge TIMER1_CH2 (PB10) and LED1 (PE2) */
+		pwm_led: pwm_led {
+			pwms = <&pwm1 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
+		};
+	};
+
+	aliases {
+		led0 = &led1;
+		led1 = &led2;
+		sw0 = &user_key;
+		pwm-led0 = &pwm_led;
+		eeprom-0 = &eeprom0;
+	};
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+};
+
+&gpioc {
+	status = "okay";
+};
+
+&gpioe {
+	status = "okay";
+};
+
+&gpiog {
+	status = "okay";
+};
+
+&gpiof {
+	status = "okay";
+};
+
+&usart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&usart0_default>;
+	pinctrl-names = "default";
+};
+
+&dac {
+	status = "okay";
+	pinctrl-0 = <&dac_default>;
+	pinctrl-names = "default";
+};
+
+&timer1 {
+	status = "okay";
+
+	pwm1: pwm {
+		status = "okay";
+		pinctrl-0 = <&pwm1_default>;
+		pinctrl-names = "default";
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+
+	eeprom0: eeprom@50 {
+		compatible = "atmel,at24";
+		reg = <0x50>;
+		status = "okay";
+		label = "EEPROM_AT24C02";
+		size = <256>;
+		pagesize = <8>;
+		address-width = <8>;
+		timeout = <5>;
+	};
+};
+
+&spi5 {
+	status = "okay";
+	pinctrl-0 = <&spi5_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
+
+	nor_flash: gd25q16@0 {
+		compatible ="jedec,spi-nor";
+		size = <0x1000000>;
+		label = "GD25Q16";
+		reg = <0>;
+		spi-max-frequency = <4000000>;
+		status = "okay";
+		jedec-id = [c8 40 15];
+	};
+};