boards: nrf: port to pinctrl

boards/arm/96b_carbon_nrf51/96b_carbon_nrf51-pinctrl.dtsi

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2022 Nordic Semiconductor
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	i2c0_default: i2c0_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
+				<NRF_PSEL(TWIM_SCL, 0, 2)>;
+		};
+	};
+
+	i2c0_sleep: i2c0_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
+				<NRF_PSEL(TWIM_SCL, 0, 2)>;
+			low-power-enable;
+		};
+	};
+
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 29)>,
+				<NRF_PSEL(UART_RX, 0, 11)>;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 29)>,
+				<NRF_PSEL(UART_RX, 0, 11)>;
+			low-power-enable;
+		};
+	};
+
+	spi1_default: spi1_default {
+		group1 {
+			psels = <NRF_PSEL(SPIS_SCK, 0, 7)>,
+				<NRF_PSEL(SPIS_MOSI, 0, 0)>,
+				<NRF_PSEL(SPIS_MISO, 0, 30)>,
+				<NRF_PSEL(SPIS_CSN, 0, 25)>;
+		};
+	};
+
+};

boards/arm/96b_carbon_nrf51/96b_carbon_nrf51.dts

@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include <nordic/nrf51822_qfac.dtsi>
+#include "96b_carbon_nrf51-pinctrl.dtsi"
 
 / {
 	model = "Seeed Studio Carbon nRF51 96board";
@@ -30,26 +31,26 @@
 
 &i2c0 {
 	status = "okay";
-	sda-pin = <28>;
-	scl-pin = <2>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-1 = <&i2c0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &uart0 {
 	current-speed = <115200>;
 	status = "okay";
-	tx-pin = <29>;
-	rx-pin = <11>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &spi1 {
 	compatible = "nordic,nrf-spis";
 	status = "okay";
-	sck-pin = <7>;
-	mosi-pin = <0>;
-	miso-pin = <30>;
-	csn-pin = <25>;
 	def-char = <0x00>;
 
+	pinctrl-0 = <&spi1_default>;
+	pinctrl-names = "default";
 	bt-hci@0 {
 		compatible = "zephyr,bt-hci-spi-slave";
 		reg = <0>;

boards/arm/96b_carbon_nrf51/96b_carbon_nrf51_defconfig

@@ -16,3 +16,5 @@ CONFIG_UART_CONSOLE=y
 # spi
 CONFIG_SPI=y
 CONFIG_SPI_SLAVE=y
+
+CONFIG_PINCTRL=y

boards/arm/96b_nitrogen/96b_nitrogen-pinctrl.dtsi

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2022 Nordic Semiconductor
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 13)>,
+				<NRF_PSEL(UART_RX, 0, 15)>,
+				<NRF_PSEL(UART_RTS, 0, 12)>,
+				<NRF_PSEL(UART_CTS, 0, 14)>;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 13)>,
+				<NRF_PSEL(UART_RX, 0, 15)>,
+				<NRF_PSEL(UART_RTS, 0, 12)>,
+				<NRF_PSEL(UART_CTS, 0, 14)>;
+			low-power-enable;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
+				<NRF_PSEL(TWIM_SCL, 0, 22)>;
+		};
+	};
+
+	i2c0_sleep: i2c0_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
+				<NRF_PSEL(TWIM_SCL, 0, 22)>;
+			low-power-enable;
+		};
+	};
+
+	spi1_default: spi1_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
+				<NRF_PSEL(SPIM_MISO, 0, 25)>;
+		};
+	};
+
+	spi1_sleep: spi1_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
+				<NRF_PSEL(SPIM_MISO, 0, 25)>;
+			low-power-enable;
+		};
+	};
+
+};

boards/arm/96b_nitrogen/96b_nitrogen.dts

@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <nordic/nrf52832_qfaa.dtsi>
 #include "96b_lscon.dtsi"
+#include "96b_nitrogen-pinctrl.dtsi"
 
 / {
 	model = "Seeed Studio Nitrogen 96board";
@@ -66,25 +67,25 @@
 	compatible = "nordic,nrf-uart";
 	current-speed = <115200>;
 	status = "okay";
-	tx-pin = <13>;
-	rx-pin = <15>;
-	rts-pin = <12>;
-	cts-pin = <14>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &i2c0 {
 	compatible = "nordic,nrf-twi";
 	status = "okay";
-	sda-pin = <20>;
-	scl-pin = <22>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-1 = <&i2c0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &spi1 {
 	compatible = "nordic,nrf-spi";
 	status = "okay";
-	sck-pin = <26>;
-	mosi-pin = <23>;
-	miso-pin = <25>;
+	pinctrl-0 = <&spi1_default>;
+	pinctrl-1 = <&spi1_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &flash0 {

boards/arm/96b_nitrogen/96b_nitrogen_defconfig

@@ -18,3 +18,5 @@ CONFIG_UART_CONSOLE=y
 
 # additional board options
 CONFIG_GPIO_AS_PINRESET=y
+
+CONFIG_PINCTRL=y

boards/arm/actinius_icarus/actinius_icarus_common-pinctrl.dtsi

@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2022 Nordic Semiconductor
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 9)>,
+				<NRF_PSEL(UART_RX, 0, 6)>,
+				<NRF_PSEL(UART_RTS, 0, 7)>,
+				<NRF_PSEL(UART_CTS, 0, 25)>;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 9)>,
+				<NRF_PSEL(UART_RX, 0, 6)>,
+				<NRF_PSEL(UART_RTS, 0, 7)>,
+				<NRF_PSEL(UART_CTS, 0, 25)>;
+			low-power-enable;
+		};
+	};
+
+	uart1_default: uart1_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 24)>,
+				<NRF_PSEL(UART_RX, 0, 23)>;
+		};
+	};
+
+	uart1_sleep: uart1_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 24)>,
+				<NRF_PSEL(UART_RX, 0, 23)>;
+			low-power-enable;
+		};
+	};
+
+	uart2_default: uart2_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 4)>,
+				<NRF_PSEL(UART_RX, 0, 5)>;
+		};
+	};
+
+	uart2_sleep: uart2_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 4)>,
+				<NRF_PSEL(UART_RX, 0, 5)>;
+			low-power-enable;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
+				<NRF_PSEL(TWIM_SCL, 0, 27)>;
+		};
+	};
+
+	i2c2_sleep: i2c2_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
+				<NRF_PSEL(TWIM_SCL, 0, 27)>;
+			low-power-enable;
+		};
+	};
+
+	spi3_default: spi3_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 21)>,
+				<NRF_PSEL(SPIM_MISO, 0, 22)>;
+		};
+	};
+
+	spi3_sleep: spi3_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 21)>,
+				<NRF_PSEL(SPIM_MISO, 0, 22)>;
+			low-power-enable;
+		};
+	};
+
+	pwm0_default: pwm0_default {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 10)>,
+				<NRF_PSEL(PWM_OUT1, 0, 11)>,
+				<NRF_PSEL(PWM_OUT2, 0, 12)>;
+			nordic,invert;
+		};
+	};
+
+	pwm0_sleep: pwm0_sleep {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 10)>,
+				<NRF_PSEL(PWM_OUT1, 0, 11)>,
+				<NRF_PSEL(PWM_OUT2, 0, 12)>;
+			low-power-enable;
+		};
+	};
+
+};

boards/arm/actinius_icarus/actinius_icarus_common.dts

@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+#include "actinius_icarus_common-pinctrl.dtsi"
 
 / {
 	model = "Actinius Icarus IoT Dev Board";
@@ -99,34 +100,36 @@
 	status = "okay";
 
 	current-speed = <115200>;
-	tx-pin = <9>;
-	rx-pin = <6>;
-	rts-pin = <7>;
-	cts-pin = <25>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &uart1 {
 	status = "okay";
 
 	current-speed = <115200>;
-	tx-pin = <24>;
-	rx-pin = <23>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-1 = <&uart1_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &uart2 {
 	current-speed = <115200>;
-	tx-pin = <4>;
-	rx-pin = <5>;
+	pinctrl-0 = <&uart2_default>;
+	pinctrl-1 = <&uart2_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &i2c2 {
 	compatible = "nordic,nrf-twim";
 	status = "okay";
 
 	clock-frequency = <I2C_BITRATE_FAST>;
-	sda-pin = <26>;
-	scl-pin = <27>;
 
+	pinctrl-0 = <&i2c2_default>;
+	pinctrl-1 = <&i2c2_sleep>;
+	pinctrl-names = "default", "sleep";
 	lis2dh12-accel@19 {
 		compatible = "st,lis2dh12", "st,lis2dh";
 		reg = <0x19>;
@@ -140,22 +143,16 @@
 	compatible = "nordic,nrf-spim";
 	status = "okay";
 
-	sck-pin = <20>;
-	mosi-pin = <21>;
-	miso-pin = <22>;
+	pinctrl-0 = <&spi3_default>;
+	pinctrl-1 = <&spi3_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &pwm0 {
 	status = "okay";
-
-	ch0-pin = <10>;
-	ch0-inverted;
-
-	ch1-pin = <11>;
-	ch1-inverted;
-
-	ch2-pin = <12>;
-	ch2-inverted;
+	pinctrl-0 = <&pwm0_default>;
+	pinctrl-1 = <&pwm0_sleep>;
+	pinctrl-names = "default", "sleep";
 };
 
 &timer0 {