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[Hardware][Intel] Support compressed-tensor W8A8 for CPU backend #7257
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Hi @robertgshaw2-neuralmagic @mgoin @WoosukKwon, I think this PR is ready. Would you please help to review it? Thanks! |
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This looks reasonable, but could you implement a CPU test for this?
csrc/cpu/torch_bindings.cpp
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I think it is confusing to call this cpu implementation cutlass_scaled_mm, especially since this only supports int8 while the GPU cutlass_scaled_mm supports fp8 and int8. I would prefer to keep int8 and possibly dnnl in the name.
I understand reusing this name likely provides some ease in re-using the testing we have for cutlass_scaled_mm, so I'm open to thoughts here. cc @tlrmchlsmth
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Using the same function signature makes the kernel replacement seamlessly. The kernel for CPU will check the input types and throw error message when they are not INT8.
Maybe change cutlass_scaled_mm to a general name is more clear, like scaled_mm or compressed_tensor_scaled_mm.
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Okay that is fair enough to land now for easy functionality
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Maybe change cutlass_scaled_mm to a general name is more clear, like scaled_mm
I'm in favor of this as long as we maintain a consistent interface. (I don't think compressed_tensor_scaled_mm is right though, since we use the kernels for other model formats, like fb_gemm)
vllm/platforms/interface.py
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Maybe we should implement a CPU device capability? Curious on your thoughts @youkaichao
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I would prefer to provide explicit feature checking interfaces, like support_compressed_tensor_fp8, which will make the Platform more extensible and portable.
tests/kernels/test_cutlass.py
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Like the previous mention on overloading the name cutlass_scaled_mm, I think it makes sense to duplicate a separate kernel test for CPU gemm
I appreciate the kernel testing but I would like to see an e2e test making sure model loading, weight packing, etc works since this PR plugs into compressed-tensors - just loading the model and generating a few tokens should be sufficient
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We can use cases from test_compressed_tensors.py and execute E2E tests to verify the feature workflow on the CPU backend.
The kernel tests will be keep internally and executed regularly.
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Hi @mgoin gentle ping, would you please kindly help to take a look again? thanks, -yuan |
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This looks to be in a good place, I just would like to see more care placed on the short-circuit in _check_scheme_supported. It would be great if you could start implementing a CPU platform class so we could check for hardware features like avx512
csrc/cpu/torch_bindings.cpp
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Okay that is fair enough to land now for easy functionality
| def _verify_and_get_parallel_config(config: ParallelConfig) -> ParallelConfig: | ||
| config.distributed_executor_backend = "mp" | ||
| return config |
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It might be worth leaving a log here saying that we are overriding X to "mp"
| f"Current capability: {capability}.") | ||
| return supported | ||
| else: | ||
| return True |
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If capability is None, we say the scheme is supported? This does not seem like good logic to do for all CT schemes, but I'm not sure how to get around this.. Could you at least put a warning here that we couldn't detect device capability and are allowing the scheme to pass
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I noticed this function is only used to checking FP8 support, so it should return False on non-cuda devices by default.
This reverts commit 9eeddeab118a6aef5304c3134c9e3d57f9447454.
This reverts commit d9bcfb2d4ae31177aac85047c31edbf39b4b4e90.
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Hi @mgoin , thanks for your comments! I made some modification based on the comments. For now, the Instruction set checking is done during the compilation time. I added a basic |
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I appreciate the changes a lot, this looks good to me!
| backend = "mp" | ||
| ray_found = ray_utils.ray_is_available() | ||
| if cuda_device_count_stateless() < self.world_size: | ||
| if (torch.cuda.is_available() |
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weight loading tests start to fail after this pr , I think this line is to blame. cc @mgoin
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@bigPYJ1151 could you take a look at #7270 - I changed the ops bindings for quantization that you added to the CU backend in this PR |
…m-project#7257) Signed-off-by: Alvant <alvasian@yandex.ru>
…m-project#7257) Signed-off-by: Amit Garg <mitgarg17495@gmail.com>
…m-project#7257) Signed-off-by: LeiWang1999 <leiwang1999@outlook.com>
This PR provides corresponding CPU kernels of the compressed-tensor INT8 W8A8, based on oneDNN, to enable lowering compressed-tensor operations to CPU device.
Both of the static and dynamic mode are supported, and verified with related unit tests.
We initially got ~40% (static) and ~30% (dynamic) throughput improvement on llama3-8b model, with limited accuracy drop.
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