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Pull requests: verilog-to-routing/vtr-verilog-to-routing

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Pull requests list

[WIP] Tileable Routing Resource Graph Builder build Build system docs Documentation external_libs infra Project Infrastructure lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-make CMake/Make code lang-netlist lang-python Python code lang-shell Shell scripts (bash etc.) libarchfpga Library for handling FPGA Architecture descriptions liblog libpugiutil libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item Parmys scripts Utility & Infrastructure scripts VPR VPR FPGA Placement & Routing Tool
#2135 opened Aug 16, 2022 by tangxifan Loading… updated Jun 11, 2025
7 of 19 tasks
WIP: clang-tidy fixes around const std::string references. ABC ABC Logic Optimization & Technology Mapping Tool external_libs libarchfpga Library for handling FPGA Architecture descriptions libpugiutil libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item VPR VPR FPGA Placement & Routing Tool
#1764 opened Jun 3, 2021 by mithro Loading… updated Jun 17, 2021
12
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