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Issues list

sky130: fix I/O modifications bug
#878 opened Oct 8, 2024 by edwardcwang Loading…
5 of 9 tasks
2 Problems about VLSI Flow bug
#874 opened Aug 31, 2024 by exhaust-create
8 tasks done
P&R timing flow for Innovus/Tempus bug
#858 opened Apr 26, 2024 by rahulk29 Loading…
5 of 14 tasks
4
Investigate VPD, FSDB Support bug Cadence Specific to a Cadence tool help wanted high priority No workaround exists, many people blocked, chip-breaking issues
#769 opened Jun 16, 2022 by harrisonliew
@dpgrubb13
3
GDS Map File for Innovus and Voltus are in different formats bug Cadence Specific to a Cadence tool low priority Easy workaround exists, regular QoL issue
#768 opened Feb 5, 2022 by harrisonliew
Hang if subprocess spawns dependent subprocess advanced PR bug low priority Easy workaround exists, regular QoL issue usability
#630 opened Jan 25, 2022 by harrisonliew
1
vcs sim flow doesn't include -e configs in dict bug low priority Easy workaround exists, regular QoL issue usability
#587 opened Jul 19, 2020 by growly
1
LEF parser: MACRO corner case beginner PR Good for newcomers bug low priority Easy workaround exists, regular QoL issue
#570 opened Apr 11, 2020 by harrisonliew
1
Ability to add the same hooks to all hierarchical modules advanced PR bug enhancement medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue
#564 opened Feb 21, 2020 by colinschmidt
2
Additional DRC/LVS text should be specified by deck bug medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue
#528 opened Oct 3, 2019 by harrisonliew
stackup.py math error for LEF58_SPACINGTABLE bug
#523 opened Sep 27, 2019 by ssteffl
2
--drc_rundir (potentially others) seems to be ignored in hierarchical bug medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue
#475 opened Jun 29, 2019 by jwright6323
1
Overriding lazycrossref'd field has odd behavior bug low priority Easy workaround exists, regular QoL issue
#473 opened Jun 27, 2019 by jwright6323
1
Appending to None causes error bug low priority Easy workaround exists, regular QoL issue
#464 opened Jun 23, 2019 by jwright6323
4
Hammer logging output flush issues bug low priority Easy workaround exists, regular QoL issue usability
#460 opened Jun 20, 2019 by jwright6323
1
Ordering of some metas seems to matter bug low priority Easy workaround exists, regular QoL issue
#458 opened Jun 20, 2019 by jwright6323
2
PCB does not work with hierarchical bug floorplan low priority Easy workaround exists, regular QoL issue PCB board-related stuff usability
#435 opened Jun 13, 2019 by jwright6323
3
Stackups where the first entry in min_spacing isn't exactly equal to pitch - min_width causes issues bug medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue usability
#429 opened Jun 11, 2019 by edwardcwang
5
Meta behavior with defaults bug low priority Easy workaround exists, regular QoL issue
#367 opened Apr 24, 2019 by dpgrubb13
3
power_spec_mode bug bug low priority Easy workaround exists, regular QoL issue
#358 opened Apr 16, 2019 by colinschmidt
verbose_append does not escape quotes correctly bug low priority Easy workaround exists, regular QoL issue
#337 opened Mar 16, 2019 by jwright6323
1
Some tech files should live in the "Stackup" object advanced PR API bug medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue
#315 opened Feb 22, 2019 by jwright6323
3
Obstruction constraints shouldn't need an RTL path beginner PR Good for newcomers bug low priority Easy workaround exists, regular QoL issue usability
#282 opened Jan 18, 2019 by edwardcwang
1
Port parameter of clock constraints is not fully vendor-independent API bug medium priority Hard workaround exists, costing time/effort, chip QoL/QoR issue metrics
#280 opened Dec 30, 2018 by edwardcwang
@jwright6323
2
vivado plugin should set environment variables in defaults.yml bug low priority Easy workaround exists, regular QoL issue usability
#199 opened Sep 20, 2018 by edwardcwang
@edwardcwang
1
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