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Enabling JTAG Debuging in VCU118 FPGA changelog:added #1796

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merged 1 commit into from
Feb 23, 2024
Merged

Enabling JTAG Debuging in VCU118 FPGA changelog:added #1796

merged 1 commit into from
Feb 23, 2024

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ksungkeun84
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@ksungkeun84 ksungkeun84 commented Feb 23, 2024 •
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The JTAG IO pins are mapped to FMC pins.
changelog:added
Related PRs / Issues:
#1785

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

@ksungkeun84 ksungkeun84 changed the title Enabling JTAG Debuging in VCU118 FPGA Enabling JTAG Debuging in VCU118 FPGA changelog:added Feb 23, 2024
@ksungkeun84 ksungkeun84 changed the title Enabling JTAG Debuging in VCU118 FPGA changelog:added Enabling JTAG Debuging in VCU118 FPGA Feb 23, 2024
@ksungkeun84 ksungkeun84 changed the title Enabling JTAG Debuging in VCU118 FPGA Enabling JTAG Debuging in VCU118 FPGA changelog:added Feb 23, 2024
@ksungkeun84 ksungkeun84 mentioned this pull request Feb 23, 2024
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@jerryz123
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Thank you, this is very useful

@jerryz123 jerryz123 merged commit 8da6c5a into ucb-bar:main Feb 23, 2024
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@jerryz123 jerryz123 jerryz123 approved these changes

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@ksungkeun84 @jerryz123