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Sky130/Openroad Tutorial Fixes #1392

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Mar 14, 2023
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d5f1dd9
changed key from openram to sram22
nayiri-k Mar 9, 2023
15d001f
updated skywater tutorials
nayiri-k Mar 9, 2023
b52cad6
updated conda lock to install sky130A pdk
nayiri-k Mar 10, 2023
4d7cf6e
adding hammer paper to main readme
nayiri-k Mar 10, 2023
81e11ee
updating macro paths for asap7 tutorial to match new SRAM paths after…
nayiri-k Mar 10, 2023
89a23fa
updating docs to include correct build path [skip ci]
nayiri-k Mar 10, 2023
6dba66f
updated tutorial configuration files [skip ci]
nayiri-k Mar 10, 2023
39260ac
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 10, 2023
47f84e9
Merge branch 'main' of https://github.com/ucb-bar/chipyard into vlsi-…
nayiri-k Mar 10, 2023
c43dcc6
testing out chipyard tutorial flow
nayiri-k Mar 11, 2023
e78b424
testing commands thru syn
nayiri-k Mar 11, 2023
8d88ffb
moving vlsi flow setup earlier for testing
nayiri-k Mar 11, 2023
2a0c222
small fix
nayiri-k Mar 11, 2023
07e547f
another small fix
nayiri-k Mar 11, 2023
883b920
checking that this still works
nayiri-k Mar 11, 2023
d2130f2
updated layout of openroad design [skip ci]
nayiri-k Mar 11, 2023
210e0fe
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 11, 2023
3a72865
moved test back to after setup repo
nayiri-k Mar 11, 2023
e8c1b09
added note about generated-src being different for commercial/openroa…
nayiri-k Mar 11, 2023
0f326ae
floorplan for openroad flow is different from commercial flow bc of s…
nayiri-k Mar 11, 2023
271a77a
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 11, 2023
180f52e
bumping hammer-cadence-plugins
nayiri-k Mar 11, 2023
884053d
bumped to Hammer v1.0.2
nayiri-k Mar 11, 2023
1fd5381
Merge branch 'main' of https://github.com/ucb-bar/chipyard into vlsi-…
nayiri-k Mar 12, 2023
908a267
bumping hammer in conda reqs
nayiri-k Mar 12, 2023
b68ee34
bumped to hammer v1.0.4
nayiri-k Mar 12, 2023
fae8a24
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 12, 2023
3b15304
Merge branch 'vlsi-tutorial' of https://github.com/ucb-bar/chipyard i…
nayiri-k Mar 12, 2023
02a0714
small tweak:
nayiri-k Mar 12, 2023
dd7e221
changing tutorial VLSI_TOP to RocketTile to save time
nayiri-k Mar 13, 2023
d785c62
fixing typo
nayiri-k Mar 13, 2023
5751fbe
merged with main
nayiri-k Mar 13, 2023
398a017
regenerated conda lock requirements
nayiri-k Mar 13, 2023
e72d00c
stopping par before write_design bc openroad freezes
nayiri-k Mar 13, 2023
2d8e5cb
adding start_before_step to still get gds
nayiri-k Mar 13, 2023
aabf8cd
removing lvs from flow due to small bug
nayiri-k Mar 13, 2023
dfc01a2
messed up something with steps, trying again
nayiri-k Mar 13, 2023
f2cf6b7
updating prerequisite setup for sky130 tutorials [skip ci]
nayiri-k Mar 13, 2023
78b6bdb
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 13, 2023
1811d6f
made vlsi flow slightly cleaner
nayiri-k Mar 13, 2023
6cd2186
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 13, 2023
d48a7cb
tiny fix
nayiri-k Mar 13, 2023
1540f55
shouldn't have removed file from EXTRA_CONFS oops
nayiri-k Mar 13, 2023
454d619
improved tutorial makefile [skip ci]
nayiri-k Mar 14, 2023
20eecc3
testing hammer fixes before publishing to pypi
nayiri-k Mar 14, 2023
f2e2e3c
Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into o…
nayiri-k Mar 14, 2023
0ed7964
adding a note about openroad freezing post-detailed_route [skip ci]
nayiri-k Mar 14, 2023
2d5b861
bumped hammer version, everything 'should just work'
nayiri-k Mar 14, 2023
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93 changes: 71 additions & 22 deletions docs/VLSI/Sky130-Commercial-Tutorial.rst
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,25 @@ Prerequisites

* Python 3.9+
* Genus, Innovus, Voltus, VCS, and Calibre licenses
* Sky130 PDK, install using `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* Sky130A PDK, install `using conda <https://anaconda.org/litex-hub/open_pdks.sky130a>`__ or `these directions <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
* `Sram22 Sky130 SRAM macros <https://github.com/rahulk29/sram22_sky130_macros>`__

* These SRAM macros were generated using the `Sram22 SRAM generator <https://github.com/rahulk29/sram22>`__ (still very heavily under development)

Prerequisite Setup with Conda
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
As of recently, most of the prerequisites of this tutorial may now be installed as conda packages.
The setup of these tools may eventually be scripted, but for now here are the directions to set them up:

.. code-block:: shell

# create conda environment named "osflow"
conda create -n osflow
# download all files for Sky130A PDK
conda install -n osflow -c litex-hub open_pdks.sky130a
# clone the SRAM22 Sky130 SRAM macros to a convenient location
git clone https://github.com/rahulk29/sram22_sky130_macros


Initial Setup
-------------
Expand All @@ -59,6 +77,38 @@ In the Chipyard root, ensure that you have the Chipyard conda environment activa

to pull and install the plugin submodules. Note that for technologies other than ``sky130`` or ``asap7``, the tech submodule must be added in the ``vlsi`` folder first.

Now navigate to the ``vlsi`` directory. The remainder of the tutorial will assume you are in this directory.
We will summarize a few files in this directory that will be important for the rest of the tutorial.

.. code-block:: shell

cd ~chipyard/vlsi

example-vlsi-sky130
^^^^^^^^^^^^^^^^^^^
This is the entry script with placeholders for hooks. In the ``ExampleDriver`` class, a list of hooks is passed in the ``get_extra_par_hooks``. Hooks are additional snippets of python and TCL (via ``x.append()``) to extend the Hammer APIs. Hooks can be inserted using the ``make_pre/post/replacement_hook`` methods as shown in this example. Refer to the Hammer documentation on hooks for a detailed description of how these are injected into the VLSI flow.


example-sky130.yml
^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for this example project. Example clock constraints, power straps definitions, placement constraints, and pin constraints are given. Additional configuration for the extra libraries and tools are at the bottom.

Add the following YAML keys to the top of this file to specify the location of the Sky130A PDK and SRAM macros.

.. code-block:: yaml

# all ~ should be replaced with absolute paths to these directories
# technology paths
technology.sky130.sky130A: ~conda/envs/osflow/share/pdk/sky130A
technology.sky130.sram22_sky130_macros: ~sram22_sky130_macros


example-tools.yml
^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for a commercial tool flow.
It selects tools for synthesis (Cadence Genus), place and route (Cadence Innovus), DRC and LVS (Mentor Calibre).


Building the Design
--------------------
To elaborate the ``TinyRocketConfig`` and set up all prerequisites for the build system to push the design and SRAM macros through the flow:
Expand All @@ -76,32 +126,14 @@ which will cause additional variables to be set in ``tutorial.mk``, a few of whi

* ``CONFIG=TinyRocketConfig`` selects the target generator config in the same manner as the rest of the Chipyard framework. This elaborates a stripped-down Rocket Chip in the interest of minimizing tool runtime.
* ``tech_name=sky130`` sets a few more necessary paths in the ``Makefile``, such as the appropriate Hammer plugin
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-tools.yml`` and ``example-sky130.yml``, which are described below
* ``TOOLS_CONF`` and ``TECH_CONF`` select the approproate YAML configuration files, ``example-tools.yml`` and ``example-sky130.yml``, which are described above
* ``DESIGN_CONF`` and ``EXTRA_CONFS`` allow for additonal design-specific overrides of the Hammer IR in ``example-sky130.yml``
* ``VLSI_OBJ_DIR=build-sky130-commercial`` gives the build directory a unique name to allow running multiple flows in the same repo. Note that for the rest of the tutorial we will still refer to this directory in file paths as ``build``, again for brevity.
* ``VLSI_TOP`` is by default ``ChipTop``, which is the name of the top-level Verilog module generated in the Chipyard SoC configs. By instead setting ``VLSI_TOP=Rocket``, we can use the Rocket core as the top-level module for the VLSI flow, which consists only of a single RISC-V core (and no caches, peripherals, buses, etc). This is useful to run through this tutorial quickly, and does not rely on any SRAMs.

Running the VLSI Flow
---------------------

example-vlsi-sky130
^^^^^^^^^^^^^^^^^^^
This is the entry script with placeholders for hooks. In the ``ExampleDriver`` class, a list of hooks is passed in the ``get_extra_par_hooks``. Hooks are additional snippets of python and TCL (via ``x.append()``) to extend the Hammer APIs. Hooks can be inserted using the ``make_pre/post/replacement_hook`` methods as shown in this example. Refer to the Hammer documentation on hooks for a detailed description of how these are injected into the VLSI flow.


example-sky130.yml
^^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for this example project. Example clock constraints, power straps definitions, placement constraints, and pin constraints are given. Additional configuration for the extra libraries and tools are at the bottom.

First, set ``technology.sky130.sky130A/sky130_nda/openram_lib`` to the absolute path of the respective directories containing the Sky130 PDK and SRAM files. See the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__
for details about the PDK setup.

example-tools.yml
^^^^^^^^^^^^^^^^^
This contains the Hammer configuration for a commercial tool flow.
It selects tools for synthesis (Cadence Genus), place and route (Cadence Innovus), DRC and LVS (Mentor Calibre).

Synthesis
^^^^^^^^^
.. code-block:: shell
Expand Down Expand Up @@ -129,9 +161,9 @@ To run DRC & LVS, and view the results in Calibre:
.. code-block:: shell

make drc tutorial=sky130-commercial
./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/drc-rundir/generated-scripts/view_drc
./build/drc-rundir/generated-scripts/view_drc
make lvs tutorial=sky130-commercial
./build/chipyard.TestHarness.TinyRocketConfig-ChipTop/lvs-rundir/generated-scripts/view_lvs
./build/lvs-rundir/generated-scripts/view_lvs
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Some DRC errors are expected from this PDK, especially with regards to the SRAMs, as explained in the
`Sky130 Hammer plugin README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/sky130>`__.
Expand Down Expand Up @@ -160,3 +192,20 @@ Post-P&R power and rail (IR drop) analysis is supported with Voltus:
If you append the ``BINARY`` variable to the command, it will use the activity file generated from a ``sim-<syn/par>-debug`` run and report dynamic power & IR drop from the toggles encoded in the waveform.

To bypass gate-level simulation, you will need to run the power tool manually (see the generated commands in the generated ``hammer.d`` buildfile). Static and active (vectorless) power & IR drop will be reported.


VLSI Flow Control
^^^^^^^^^^^^^^^^^
Firt, refer to the :ref:`VLSI/Hammer:VLSI Flow Control` documentation. The below examples use the ``redo-par`` Make target to re-run only place-and-route. ``redo-`` may be prepended to any of the VLSI flow actions to re-run only that action.

.. code-block:: shell

# the following two statements are equivalent because the
# extraction step immediately precedes the write_design step
make redo-par HAMMER_EXTRA_ARGS="--start_after_step extraction"
make redo-par HAMMER_EXTRA_ARGS="--start_before_step write_design"

# example of re-running only floorplanning to test out a new floorplan configuration
# the "-p file.yml" causes file.yml to override any previous yaml/json configurations
make redo-par \
HAMMER_EXTRA_ARGS="--only_step floorplan_design -p example-designs/sky130-openroad.yml"
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