Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

New Hammer #1324

Merged
merged 30 commits into from
Feb 15, 2023
Merged
Show file tree
Hide file tree
Changes from 29 commits
Commits
Show all changes
30 commits
Select commit Hold shift + click to select a range
22fda3a
initial migration to new Hammer
harrisonliew Feb 1, 2023
1dcc7bd
use pip within conda, update docs + links
harrisonliew Feb 1, 2023
4853935
Makefile fixes, but sim still doesn't work
harrisonliew Feb 2, 2023
a9f9f32
restore sim_files recipe
harrisonliew Feb 2, 2023
22834fa
top blackbox isolation hack, bump submodules
harrisonliew Feb 3, 2023
c9cf69d
extra tabs in Makefile
harrisonliew Feb 3, 2023
9e8812d
Add python file to split top.bb.f & model.bb.f
joonho3020 Feb 3, 2023
736dd2e
type-o
joonho3020 Feb 3, 2023
b02c44a
Remove SRAM annotations when ENABLE_CUSTOM_FIRRTL_PASS is set
joonho3020 Feb 3, 2023
a6342ce
[skip ci] update some docs, merge VLSI_RTL and VLSI_BB into one
harrisonliew Feb 3, 2023
223995f
[skip ci] Makefile typo
harrisonliew Feb 3, 2023
2680f55
[skip ci] trying ENABLE_CUSTOM_FIRRTL_PASS=1 for Yosys, clarify init …
harrisonliew Feb 4, 2023
f51457c
More robust splitting of BB filelists | Missed pre-commit | Removed o…
abejgonzalez Feb 5, 2023
81ced28
Bump pre-commit
abejgonzalez Feb 6, 2023
6e616da
Bump to 1.29.0 firtool
abejgonzalez Feb 6, 2023
efb4b7d
Fix barstools for 1.29.0 firtool
abejgonzalez Feb 6, 2023
823970e
Checkout proper commits of submodules after rebase
abejgonzalez Feb 6, 2023
61d094e
[skip ci] Add sv2v, sty. Fix Makefile rebuild. Using sv2v, but Yosys …
harrisonliew Feb 9, 2023
2bfc6e1
[skip ci] abandon sv2v, Genus happy with patched firtool
harrisonliew Feb 9, 2023
ea65d93
[skip ci] remove need to set site_packages_dir
harrisonliew Feb 9, 2023
83764d3
[skip ci] add power-rtl and power-syn targets
harrisonliew Feb 9, 2023
bd30b51
firtool 1.29.0.newhammerhotfix works for Yosys
harrisonliew Feb 10, 2023
e4b35f4
Merge branch 'main' into new-hammer
harrisonliew Feb 10, 2023
14dec6e
disallowPackedArrays still broken, but don't need it. Bump barstools.…
harrisonliew Feb 10, 2023
87209eb
remove hammer from check-on-master-check
harrisonliew Feb 11, 2023
b937a27
update firtool to 1.30.0
joonho3020 Feb 11, 2023
4977d8f
Upgrade-vlsi script
Feb 13, 2023
e7152d5
support main or master as default branch in hammer plugins
harrisonliew Feb 14, 2023
682f98b
bump to hammer 1.0.1
harrisonliew Feb 14, 2023
a998754
simplify vlsi Makefile a bit
sagark Feb 15, 2023
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 0 additions & 5 deletions .github/scripts/check-commit.sh
Original file line number Diff line number Diff line change
Expand Up @@ -98,11 +98,6 @@ dir="sims"
branches=("master" "main" "dev" "1.13.x")
search

submodules=("hammer")
dir="vlsi"
branches=("master")
search

submodules=("fpga-shells")
dir="fpga"
branches=("main")
Expand Down
3 changes: 0 additions & 3 deletions .gitmodules
Original file line number Diff line number Diff line change
Expand Up @@ -28,9 +28,6 @@
[submodule "generators/block-inclusivecache-sifive"]
path = generators/sifive-cache
url = https://github.com/chipsalliance/rocket-chip-inclusive-cache.git
[submodule "vlsi/hammer"]
path = vlsi/hammer
url = https://github.com/ucb-bar/hammer.git
[submodule "tools/dsptools"]
path = tools/dsptools
url = https://github.com/ucb-bar/dsptools.git
Expand Down
2 changes: 1 addition & 1 deletion .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
# See https://pre-commit.com/hooks.html for more hooks
repos:
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v3.2.0
rev: v4.4.0
hooks:
- id: trailing-whitespace
- id: end-of-file-fixer
Expand Down
20 changes: 16 additions & 4 deletions common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -177,11 +177,13 @@ endif
--annotation-file $(FINAL_ANNO_FILE) \
--log-level $(FIRRTL_LOGLEVEL) \
--allow-unrecognized-annotations \
-DX $(SFC_LEVEL) \
-X $(SFC_LEVEL) \
$(EXTRA_FIRRTL_OPTIONS))
$(EXTRA_FIRRTL_OPTIONS)) # -X and -DX are duplicates to allow for extra FIRRTL passes to be run
-mv $(SFC_FIRRTL_BASENAME).lo.fir $(SFC_FIRRTL_FILE) # Optionally change file type when SFC generates LowFIRRTL
@if [ "$(SFC_LEVEL)" = low ]; then cat $(SFC_ANNO_FILE) | jq 'del(.[] | select(.target | test("io.cpu"))?)' > /tmp/unnec-anno-deleted.sfc.anno.json; fi
@if [ "$(SFC_LEVEL)" = low ]; then cat /tmp/unnec-anno-deleted.sfc.anno.json > $(SFC_ANNO_FILE) && rm /tmp/unnec-anno-deleted.sfc.anno.json; fi
@if [ "$(SFC_LEVEL)" = low ]; then cat /tmp/unnec-anno-deleted.sfc.anno.json | jq 'del(.[] | select(.class | test("SRAMAnnotation"))?)' > /tmp/unnec-anno-deleted2.sfc.anno.json; fi
@if [ "$(SFC_LEVEL)" = low ]; then cat /tmp/unnec-anno-deleted2.sfc.anno.json > $(SFC_ANNO_FILE) && rm /tmp/unnec-anno-deleted.sfc.anno.json && rm /tmp/unnec-anno-deleted2.sfc.anno.json; fi
firtool \
--format=fir \
--dedup \
Expand All @@ -192,7 +194,7 @@ endif
--disable-annotation-classless \
--disable-annotation-unknown \
--mlir-timing \
--lowering-options=emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,explicitBitcast,verifLabels,locationInfoStyle=wrapInAtSquareBracket \
--lowering-options=emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,verifLabels,locationInfoStyle=wrapInAtSquareBracket \
--repl-seq-mem \
--repl-seq-mem-file=$(MFC_SMEMS_CONF) \
--repl-seq-mem-circuit=$(MODEL) \
Expand All @@ -218,6 +220,14 @@ $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILEL
$(SED) -i 's/\.\///' $(BB_MODS_FILELIST)
sort -u $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(BB_MODS_FILELIST) > $(ALL_MODS_FILELIST)

$(TOP_BB_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST) &: $(BB_MODS_FILELIST) $(MFC_TOP_HRCHY_JSON) $(FINAL_ANNO_FILE)
$(base_dir)/scripts/split-bb-files.py \
--in-bb-f $(BB_MODS_FILELIST) \
--in-top-hrchy-json $(MFC_TOP_HRCHY_JSON) \
--in-anno-json $(FINAL_ANNO_FILE) \
--out-top-bb-f $(TOP_BB_MODS_FILELIST) \
--out-model-bb-f $(MODEL_BB_MODS_FILELIST)

$(TOP_SMEMS_CONF) $(MODEL_SMEMS_CONF) &: $(MFC_SMEMS_CONF) $(MFC_MODEL_HRCHY_JSON)
$(base_dir)/scripts/split-mems-conf.py \
--in-smems-conf $(MFC_SMEMS_CONF) \
Expand All @@ -238,8 +248,10 @@ $(MODEL_SMEMS_FILE) $(MODEL_SMEMS_FIR) &: $(MODEL_SMEMS_CONF) | $(TOP_SMEMS_FILE

########################################################################################
# remove duplicate files and headers in list of simulation file inputs
# note: {MODEL,TOP}_BB_MODS_FILELIST is added as a req. so that the files get generated,
# however it is really unneeded since ALL_MODS_FILELIST includes all BB files
########################################################################################
$(sim_common_files): $(sim_files) $(ALL_MODS_FILELIST) $(TOP_SMEMS_FILE) $(MODEL_SMEMS_FILE)
$(sim_common_files): $(sim_files) $(ALL_MODS_FILELIST) $(TOP_SMEMS_FILE) $(MODEL_SMEMS_FILE) $(TOP_BB_MODS_FILELIST) $(MODEL_BB_MODS_FILELIST)
sort -u $(sim_files) $(ALL_MODS_FILELIST) | grep -v '.*\.\(svh\|h\)$$' > $@
echo "$(TOP_SMEMS_FILE)" >> $@
echo "$(MODEL_SMEMS_FILE)" >> $@
Expand Down
7 changes: 5 additions & 2 deletions conda-reqs/chipyard.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -29,10 +29,10 @@ dependencies:
- binutils

- dromajo # from ucb-bar channel - https://github.com/riscv-boom/dromajo
- firtool>=1.25 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock
- firtool==1.30.0 # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock

# firemarshal deps
- python>=3.8
- python>=3.9
- bc
- patch
- which
Expand Down Expand Up @@ -91,6 +91,7 @@ dependencies:
- wget
- sed
- autoconf
- pre-commit

# clang-format for driver coding style enforcement.
- clang-format
Expand Down Expand Up @@ -121,12 +122,14 @@ dependencies:
- boto3-stubs==1.21.6
- botocore-stubs==1.24.7
- mypy-boto3-s3==1.21.0
- sty==1.0.0
- pip
- pip:
- fab-classic==1.19.1
- mypy-boto3-ec2==1.21.9
- sure==2.0.0
- pylddwrap==1.2.1
- hammer-vlsi[asap7]==1.0.1

# doc requirements
- sphinx
Expand Down
Loading