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MultiSoC Configs should handle uniquification between harness and multiple ChipTops #1624
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Shouldn't the multi-soc config treat everything that is not ChipTop0 as within the harness, from a unifuification perspectivice? |
Correct, it does. However, I think all "ChipTop{_*}"'s should be "bundled" together. Otherwise, there are modules that are uniquified incorrectly causing missing Verilog errors in VCS/Verilator. |
Hmmm, does the default compile for some multi-top config fail because of this? I thought the uniquification would never cause modules to be "lost" like this |
Yea I was seeing errors with my specific SoC config (fairly beefly dual-Rocket-SoC + rocc accelerators + mmio devices config). I'll try to recreate this, but this issue serves as a reminder that this is an issue. |
Also, I'm not sure this is related exactly to this issue but also comes up in a similar setup... If you have two |
Does this happen for a single-soc build as well? |
Untested right now but this should be easy to replicate both in/out of Chipyard. |
Background Work
Feature Description
Currently, both
firtool
andscripts/uniquify-*
support having 1 ChipTop to uniquify modules (firtool
can only mark 1 module underneath the harness as a DUT - used to generate the corresponding json)(scripts/uniquify-*
directly checks if the--dut
arg matches a specific module).This should be supported somehow.
Motivating Example
Can't generate multi-SoC config. where modules might need to be uniquified between the harness and multiple chiptops.
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