Clean gen-collateral directory on builds

[jerryz123]

Background Work

• Yes, I searched the mailing list
• Yes, I searched prior issues
• Yes, I searched the documentation

Chipyard Version and Hash

Release: dev
Hash: f2dfd29

OS Setup

Millennium

Other Setup

No response

Current Behavior

New verilog/cc/h files are added to gen-collateral on RTL builds. Existing files are overwritten if the name matches, but preserved otherwise.

This causes issues for flows which read all files from gen-collateral, since changing a RTL config may not cause files to be deleted from that directory.

For example, building a UART-enabled design dumps SimUART.v into that directory. But then, after I modify that config to remove the UART, SimUART.v is not removed from that directory.

Expected Behavior

The contents of gen-collateral should be deleted before adding new files to it.

Other Information

No response

[jerryz123]

Resolved by #1342