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Add testchip_fesvr to uncondtionally used resources
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jerryz123 committed Oct 2, 2020
1 parent f7f71c1 commit c6864a9
Showing 1 changed file with 2 additions and 0 deletions.
2 changes: 2 additions & 0 deletions generators/utilities/src/main/scala/Simulator.scala
Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,8 @@ object GenerateSimFiles extends App with HasGenerateSimConfig {
}
def resources(sim: Simulator): Seq[String] = Seq(
"/testchipip/csrc/SimSerial.cc",
"/testchipip/csrc/testchip_fesvr.cc",
"/testchipip/csrc/testchip_fesvr.h",
"/testchipip/csrc/SimDRAM.cc",
"/testchipip/csrc/mm.h",
"/testchipip/csrc/mm.cc",
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