Move sim_files creation after FIRTOOL | Have FIRTOOL delete collatera…

…l dir
ucb-bar · Feb 15, 2023 · 2e7613e · 2e7613e
1 parent 58a6e72
commit 2e7613e
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Showing 5 changed files with 18 additions and 20 deletions.
diff --git a/common.mk b/common.mk
@@ -91,7 +91,7 @@ endif
 #########################################################################################
 # copy over bootrom files
 #########################################################################################
-$(build_dir) $(GEN_COLLATERAL_DIR):
+$(build_dir):
 	mkdir -p $@
 
 $(BOOTROM_TARGETS): $(build_dir)/bootrom.%.img: $(TESTCHIP_RSRCS_DIR)/testchipip/bootrom/bootrom.%.img | $(build_dir)
@@ -101,7 +101,7 @@ $(BOOTROM_TARGETS): $(build_dir)/bootrom.%.img: $(TESTCHIP_RSRCS_DIR)/testchipip
 # create firrtl file rule and variables
 #########################################################################################
 # AG: must re-elaborate if cva6 sources have changed... otherwise just run firrtl compile
-$(FIRRTL_FILE) $(ANNO_FILE) &: $(SCALA_SOURCES) $(sim_files) $(SCALA_BUILDTOOL_DEPS) $(EXTRA_GENERATOR_REQS)
+$(FIRRTL_FILE) $(ANNO_FILE) &: $(SCALA_SOURCES) $(SCALA_BUILDTOOL_DEPS) $(EXTRA_GENERATOR_REQS)
 	mkdir -p $(build_dir)
 	$(call run_scala_main,$(SBT_PROJECT),$(GENERATOR_PACKAGE).Generator,\
 		--target-dir $(build_dir) \
@@ -144,7 +144,8 @@ SFC_MFC_TARGETS = \
 	$(MFC_MODEL_HRCHY_JSON) \
 	$(MFC_MODEL_SMEMS_JSON) \
 	$(MFC_FILELIST) \
-	$(MFC_BB_MODS_FILELIST)
+	$(MFC_BB_MODS_FILELIST) \
+	$(GEN_COLLATERAL_DIR)
 
 SFC_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SFC_SMEMS_CONF)
 
@@ -161,6 +162,7 @@ SFC_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SFC_SMEMS_CONF)
 # hack: when using dontTouch, io.cpu annotations are not removed by SFC,
 # hence we remove them manually by using jq before passing them to firtool
 $(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(VLOG_SOURCES)
+	rm -rf $(GEN_COLLATERAL_DIR)
 ifeq (,$(ENABLE_CUSTOM_FIRRTL_PASS))
 	$(eval SFC_LEVEL := $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), low, none))
 	$(eval EXTRA_FIRRTL_OPTIONS += $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), $(SFC_REPL_SEQ_MEM),))

diff --git a/fpga/Makefile b/fpga/Makefile
@@ -94,11 +94,10 @@ SIM_FILE_REQS += \
 	$(ROCKETCHIP_RSRCS_DIR)/vsrc/EICG_wrapper.v
 
 # copy files but ignore *.h files in *.f (match vcs)
-$(sim_files): $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
-	rm -rf $(GEN_COLLATERAL_DIR)/*
-	cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
+$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR)
+	cp -f $^ $(GEN_COLLATERAL_DIR)
 	$(foreach file,\
-		$(SIM_FILE_REQS),\
+		$^,\
 		$(if $(filter %.h,$(file)),\
 			,\
 			echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;))

diff --git a/sims/vcs/Makefile b/sims/vcs/Makefile
@@ -38,11 +38,10 @@ SIM_FILE_REQS += \
 	$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v
 
 # copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir)
-$(sim_files): $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
-	rm -rf $(GEN_COLLATERAL_DIR)/*
-	cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
+$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR)
+	cp -f $^ $(GEN_COLLATERAL_DIR)
 	$(foreach file,\
-		$(SIM_FILE_REQS),\
+		$^,\
 		$(if $(filter %.h,$(file)),\
 			,\
 			echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;))

diff --git a/sims/verilator/Makefile b/sims/verilator/Makefile
@@ -66,11 +66,10 @@ SIM_FILE_REQS += \
 	$(ROCKETCHIP_RSRCS_DIR)/csrc/remote_bitbang.cc
 
 # copy files and add -FI for *.h files in *.f
-$(sim_files): $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
-	rm -rf $(GEN_COLLATERAL_DIR)/*
-	cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
+$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR)
+	cp -f $^ $(GEN_COLLATERAL_DIR)
 	$(foreach file,\
-		$(SIM_FILE_REQS),\
+		$^,\
 		$(if $(filter %.h,$(file)),\
 			echo "-FI $(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;,\
 			echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;))

diff --git a/vlsi/Makefile b/vlsi/Makefile
@@ -64,7 +64,7 @@ else
 	VLSI_BB = $(sim_top_blackboxes)
 endif
 
-.PHONY: default verilog
+.PHONY: default verilog all
 default: all
 
 all: drc lvs
@@ -108,11 +108,10 @@ SIM_FILE_REQS += \
 	$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v
 
 # copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir)
-$(sim_files): $(SIM_FILE_REQS) $(build_dir)
-	rm -rf $(build_dir)/*
-	cp -f $(SIM_FILE_REQS) $(build_dir)
+$(sim_files): $(SIM_FILE_REQS) | $(build_dir)
+	cp -f $^ $(build_dir)
 	$(foreach file,\
-		$(SIM_FILE_REQS),\
+		$^,\
 		$(if $(filter %.h,$(file)),\
 			,\
 			echo "$(addprefix $(build_dir)/, $(notdir $(file)))" >> $@;))