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sram

Here are 20 public repositories matching this topic...

ultraembedded / cores

Various HDL (Verilog) IP Cores

audio asic fpga usb rtl verilog spi sram uart verilog-hdl verilog-components verilator i2s sdram

Updated Jul 1, 2021
Verilog

globalfoundries-pdk-ip-gf180mcu_fd_ip_sram

google / globalfoundries-pdk-ip-gf180mcu_fd_ip_sram

SRAM macros created for the GF180MCU provided by GlobalFoundries.

asic eda ip sram pdk openroad 180nm globalfoundries gf180mcu

Updated Apr 10, 2023
Verilog

Meshugah / ECE_337_2DGPU

2D GPU made using Verilog

line bresenham sram arc

Updated Sep 16, 2017
Verilog

therealczr15 / NYCU_ICLAB_2024S

Spring 2024 NYCU Integrated Circuit Design Laboratory (ICLAB)

pipeline rtl verilog finite-state-machine sram systemverilog dram cell-based apr combinational-circuit sequential-circuits axi4-protocol jaspergold cross-clock-domain digital-ic-design

Updated Mar 5, 2025
Verilog

FlorianFrank / verilog_baremetal_sram_controller

A bare-metal SRAM memory controller suitable for Xilinx FPGAs.

fpga verilog sram xilinx memory-controller

Updated Jan 15, 2024
Verilog

Saadia-Hassan / Types-of-Verification-Using-SRAM

This repo contains golden vector and randomization testbenches for SRAM module.

sram testbenches verification-methodologies verilog-hdl verilog-project vlsi-design

Updated Aug 2, 2020
Verilog

Shahriar-0 / Computer-Architecture-Lab-Experiments-F2023

ARM processor pipeline implementation. Featuring hazard unit, forwarding unit, SRAM & cache memory.

processor-architecture arm pipeline cache hazard sram forwarding-unit

Updated Feb 1, 2024
Verilog

arianhaddadi / ARM-Processor-32-bit

A 32-bit Arm Processor Using Verilog HDL With Hazard Detection, Forwarding Unit, SRAM Memory & A 2-Way Set-Associative Cache.

cache sram hazard-detection arm32 forwarding-unit

Updated Jul 22, 2021
Verilog

teekamkhandelwal / SRAM_Controller

The Enhanced SRAM Controller handles secure, efficient memory operations with features like burst mode, error correction, power-saving, and clock domain crossing. It’s perfect for applications requiring robust and reliable memory handling.

memory verilog sram memory-management vivado questasim sdram sdram-controller memory-controller verilog-project vlsi-design sram-controller sram-controller-advanced sram-features-power-security-brust verlog-hdl enhanched-sram-controller

Updated Oct 21, 2024
Verilog

Bhavuk-HDL / custom-asic

Eight different verilog projects are combined to creat a big custom asic project.

asic ram verilog spi sram uart nand2tetris fifo hdl risc-v caravel

Updated Jan 8, 2023
Verilog

briansune / Kintex7-GSI-SSRAM

fpga verilog sram

Updated May 6, 2020
Verilog

alumpish / CA-Lab-Projects

Projects of the computer architecture lab (Spring 02) at the University of Tehran.

processor-architecture arm pipeline cache sram forwarding-

Updated Oct 6, 2023
Verilog

parsa-hn / CAL-ARM

Computer architecture lab ARM processor with Verilog.

pipeline cache verilog sram

Updated Oct 5, 2022
Verilog

VLSI-Shubh / SRAM

SRAM Collection – Parameterized Verilog Modules for Single Port SRAM (sync/async read), Pseudo Dual Port SRAM (sync read), and True Dual Port SRAM – all parameterized, fully synthesizable, and demo’d with testbenches and waveforms.

verilog sram cache-memory vlsi-design memory-design dual-port-memory

Updated Aug 6, 2025
Verilog

mr-bat / Computer_Architecture_Lab

MIPS implementation

caching mips sram hazard-detection data-forward

Updated May 27, 2019
Verilog

SM2A / Computer_Architecture_Lab_Course_Projects

🎓💻University of Tehran Computer Architecture Lab Course Projects - Spring 2022

arm pipeline cache sram

Updated Jul 15, 2022
Verilog

dbdan114 / Verilog

Make Some CMOS Circuits

verilog sram dram

Updated Sep 29, 2025
Verilog

MisaghM / Computer-Architecture-Lab-Projects

ARM processor implementation, hazard unit, forwarding unit, SRAM & cache memory.

processor-architecture arm pipeline sram cache-memory forwarding-unit

Updated Jul 24, 2023
Verilog

mjh-design / Sram-controller-design-based-on-AHB-bus

ip sram ahb

Updated Feb 22, 2023
Verilog

mjh-design / ahb_sram

小夫同款

ip sram ahb

Updated Feb 21, 2023
Verilog

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