Varsha-art126 / rustdv_fifo Star 0 Code Issues Pull requests RustDV-based RTL verification environment for a parameterized synchronous FIFO using directed testing, deterministic randomized regression, functional coverage, corner-case testing, stress testing, scoreboard checking, VPI simulation, and GTKWave waveform analysis. rust verification scoreboard systemverilog gtkwave fifo iverilog vpi digital-design hardware-verification functional-coverage rtl-verification rustdv asfigo Updated Aug 21, 2026 Rust
Varsha-art126 / rustdv_tinyalu Star 0 Code Issues Pull requests RustDV-based RTL verification environment for a 4-bit TinyALU using directed testing, deterministic randomized regression, functional coverage, corner-case testing, scoreboard checking, VPI simulation, and GTKWave waveform analysis. rust verification scoreboard systemverilog gtkwave iverilog vpi digital-design hardware-verification functional-coverage rtl-verification rustdv Updated Aug 21, 2026 Rust