hardware
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The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
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Jul 18, 2025 - Verilog
This repository hosts the code for an FPGA based accelerator for convolutional neural networks
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Jun 20, 2024 - Verilog
A simple implementation of a UART modem in Verilog.
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Nov 10, 2021 - Verilog
An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压缩器。输入原始数据,输出标准的GZIP格式,即常见的 .gz / .tar.gz 文件的格式。
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Sep 15, 2023 - Verilog
The Task Parallel System Composer (TaPaSCo)
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May 14, 2025 - Verilog
XCrypto: a cryptographic ISE for RISC-V
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Jan 5, 2023 - Verilog
An FPGA-based LZMA compressor for generic data compression. 基于FPGA的LZMA压缩器,用于通用数据压缩。
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Sep 14, 2023 - Verilog
16-bit Adder Multiplier hardware on Digilent Basys 3
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Aug 3, 2023 - Verilog
High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.
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Nov 30, 2022 - Verilog
Small (Q)SPI flash memory programmer in Verilog
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Nov 5, 2022 - Verilog
Complex Programmable Logic Device (CPLD) Guide
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Jan 9, 2022 - Verilog
A 2D convolution hardware implementation written in Verilog
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Dec 21, 2020 - Verilog
building blocks for accelerating ZK proofs over binary fields
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Jun 19, 2025 - Verilog
[SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference
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Nov 17, 2023 - Verilog
A place to keep my synthesizable verilog examples.
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Apr 20, 2025 - Verilog
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