avalon-mm

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Here are 8 public repositories matching this topic...

panda5mt / KyogenRV

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The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

fpga intel chisel riscv chisel3 altera risc-v rv32i avalon-mm

Updated Apr 11, 2021
Scala

AhmedERady / Grad_Project

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Smart Automation Controller for Precision Agriculture

python fpga tensorflow vhdl matrix-multiplication research-project peripherals convolutional-neural-networks fpga-soc-linux fpga-soc tensorflow-examples fpga-accelerator mobilenet depthwiseconv2d tensorflow-lite depthwise-separable-convolutions fpga-programming depthwise-convolutions avalon-mm

Updated May 7, 2022
V

thai-kha / fpga-median-filter-soc-de2

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Hardware-accelerated 3×3 median filter SoC on Altera DE2 (Cyclone II) using Nios II CPU, Avalon-MM bus, and a pipelined sorting-network IP core — implemented in Verilog with Quartus II 13.0 SP1.

fpga verilog altera soc median-filter nios2 avalon-mm de2 cyclone2

Updated May 12, 2026
Verilog

Ae0lis / gemm-accelerator

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INT8 matrix multiplication accelerator. Currently a broadcast array, will later be updated to a systolic array.

linux fpga rtl systemverilog de1-soc gemm cyclone-v de1-soc-board avalon-mm

Updated Sep 16, 2026
C

maciejkwasek / uart_mm

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Uart memory mapped with Avalon-MM interface

vhdl quartus-prime uart-interface vhdl-examples cyclone-10lp vhdl-tutorial vhdl-testbench avalon-mm

Updated Feb 3, 2026
VHDL

gabrielfontini / nios2-traffic-light-controller

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FPGA-based embedded traffic controller using Nios II, VHDL, embedded C, Avalon-MM and ESP32 communication.

fpga esp32 vhdl digital-design embedded-c quartus nios-ii avalon-mm

Updated Sep 4, 2026
VHDL

Vaiy108 / intel-fpga-de10-dsp-measurement

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An end-to-end Signal Processing & Telemetry SoC for Intel DE10-MAX. Features a custom VHDL 4-tap FIR filter pipeline, Nios II soft processor integration via Avalon-MM, and hardware-mapped SPI, I2C, and JTAG UART communication fabrics. Modeled in MATLAB and verified using ModelSim analog waveforms.

fpga i2c dsp matlab vhdl telemetry embedded-systems spi uart modelsim fir-filter quartus-prime system-on-chip nios-ii avalon-mm

Updated Aug 18, 2026
HTML

lhlizdabezt / embedded-systems-fpga-review-labs

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FPGA/SoPC review lab repository covering Quartus, Platform Designer/Qsys, Verilog custom IP, Avalon-MM and Nios II C.

fpga embedded-systems verilog custom-ip quartus hardware-software sopc nios-ii platform-designer avalon-mm

Updated Aug 28, 2026
Makefile

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