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Add language mappings for Pascal, Verilog, and VHDL #8079

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merged 4 commits into from
Jan 28, 2020
Merged

Add language mappings for Pascal, Verilog, and VHDL #8079

merged 4 commits into from
Jan 28, 2020

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@creachadair creachadair commented Jan 28, 2020 •
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@creachadair creachadair changed the title WIP: Add basic intel for Pascal, Verilog, and VHDL WIP: Add language mappings for Pascal, Verilog, and VHDL Jan 28, 2020
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codecov bot commented Jan 28, 2020 •
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Codecov Report

Merging #8079 into master will decrease coverage by <.01%.
The diff coverage is 0%.

@@            Coverage Diff             @@
##           master    #8079      +/-   ##
==========================================
- Coverage   40.68%   40.67%   -0.01%     
==========================================
  Files        1286     1286              
  Lines       67149    67159      +10     
  Branches     6310     6318       +8     
==========================================
  Hits        27317    27317              
- Misses      37301    37311      +10     
  Partials     2531     2531
Impacted Files Coverage Δ
cmd/symbols/internal/pkg/ctags/parser.go 0% <0%> (ø) ⬆️
shared/src/languages.ts 5.3% <0%> (-0.15%) ⬇️

@creachadair creachadair mentioned this pull request Jan 28, 2020
Merged
@creachadair creachadair changed the title WIP: Add language mappings for Pascal, Verilog, and VHDL Add language mappings for Pascal, Verilog, and VHDL Jan 28, 2020
@creachadair creachadair self-assigned this Jan 28, 2020
@creachadair creachadair marked this pull request as ready for review January 28, 2020 18:09
@creachadair creachadair requested a review from a team January 28, 2020 18:09
@creachadair creachadair merged commit a92d440 into master Jan 28, 2020
@creachadair creachadair deleted the mjf-newlangs branch January 28, 2020 19:18
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@chrismwendt chrismwendt chrismwendt approved these changes

@felixfbecker felixfbecker felixfbecker approved these changes

@eseliger eseliger eseliger approved these changes

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@creachadair @chrismwendt @felixfbecker @eseliger