[*] rtlgen code generator implements sorting modules by vhdl library …

…which is valid for vhdl code only, but some header order a bit changed in systemc and sv too. No funcitonal changes
sergeykhbr · Nov 24, 2023 · c0d8720 · c0d8720
1 parent 3a3acbd
commit c0d8720
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Showing 20 changed files with 20 additions and 20 deletions.
diff --git a/sc/rtl/riscv_soc.h b/sc/rtl/riscv_soc.h
@@ -21,8 +21,8 @@
 #include "ambalib/types_bus0.h"
 #include "ambalib/types_bus1.h"
 #include "riverlib/river_cfg.h"
-#include "sdctrl/sdctrl_cfg.h"
 #include "riverlib/types_river.h"
+#include "sdctrl/sdctrl_cfg.h"
 #include "../prj/impl/asic/target_cfg.h"
 #include "ambalib/axictrl_bus0.h"
 #include "ambalib/axi2apb_bus1.h"

diff --git a/sc/rtl/riverlib/l2cache/l2_amba.h b/sc/rtl/riverlib/l2cache/l2_amba.h
@@ -16,8 +16,8 @@
 #pragma once
 
 #include <systemc.h>
-#include "../river_cfg.h"
 #include "../../ambalib/types_amba.h"
+#include "../river_cfg.h"
 #include "../types_river.h"
 
 namespace debugger {

diff --git a/sc/rtl/riverlib/l2cache/l2_dst.h b/sc/rtl/riverlib/l2cache/l2_dst.h
@@ -16,8 +16,8 @@
 #pragma once
 
 #include <systemc.h>
-#include "../river_cfg.h"
 #include "../../ambalib/types_amba.h"
+#include "../river_cfg.h"
 #include "../types_river.h"
 
 namespace debugger {

diff --git a/sc/rtl/riverlib/l2cache/l2serdes.h b/sc/rtl/riverlib/l2cache/l2serdes.h
@@ -16,8 +16,8 @@
 #pragma once
 
 #include <systemc.h>
-#include "../river_cfg.h"
 #include "../../ambalib/types_amba.h"
+#include "../river_cfg.h"
 #include "../types_river.h"
 
 namespace debugger {

diff --git a/sc/rtl/riverlib/river_amba.h b/sc/rtl/riverlib/river_amba.h
@@ -16,8 +16,8 @@
 #pragma once
 
 #include <systemc.h>
-#include "river_cfg.h"
 #include "../ambalib/types_amba.h"
+#include "river_cfg.h"
 #include "types_river.h"
 #include "../../prj/impl/asic/target_cfg.h"
 #include "river_top.h"

diff --git a/sc/rtl/riverlib/types_river.h b/sc/rtl/riverlib/types_river.h
@@ -16,8 +16,8 @@
 #pragma once
 
 #include <systemc.h>
-#include "river_cfg.h"
 #include "../ambalib/types_amba.h"
+#include "river_cfg.h"
 
 namespace debugger {
 

diff --git a/sc/rtl/riverlib/workgroup.h b/sc/rtl/riverlib/workgroup.h
@@ -16,9 +16,9 @@
 #pragma once
 
 #include <systemc.h>
-#include "river_cfg.h"
 #include "../ambalib/types_amba.h"
 #include "../ambalib/types_pnp.h"
+#include "river_cfg.h"
 #include "types_river.h"
 #include "../../prj/impl/asic/target_cfg.h"
 #include "dmi/dmidebug.h"

diff --git a/sv/rtl/riscv_soc.sv b/sv/rtl/riscv_soc.sv
@@ -81,8 +81,8 @@ import types_pnp_pkg::*;
 import types_bus0_pkg::*;
 import types_bus1_pkg::*;
 import river_cfg_pkg::*;
-import sdctrl_cfg_pkg::*;
 import types_river_pkg::*;
+import sdctrl_cfg_pkg::*;
 import target_cfg_pkg::*;
 import riscv_soc_pkg::*;
 

diff --git a/sv/rtl/riscv_soc_pkg.sv b/sv/rtl/riscv_soc_pkg.sv
@@ -20,8 +20,8 @@ import types_pnp_pkg::*;
 import types_bus0_pkg::*;
 import types_bus1_pkg::*;
 import river_cfg_pkg::*;
-import sdctrl_cfg_pkg::*;
 import types_river_pkg::*;
+import sdctrl_cfg_pkg::*;
 import target_cfg_pkg::*;
 
 

diff --git a/sv/rtl/riverlib/l2cache/l2_amba.sv b/sv/rtl/riverlib/l2cache/l2_amba.sv
@@ -39,8 +39,8 @@ module L2Amba #(
     output types_river_pkg::axi4_l2_out_type o_msto
 );
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import l2_amba_pkg::*;
 

diff --git a/sv/rtl/riverlib/l2cache/l2_amba_pkg.sv b/sv/rtl/riverlib/l2cache/l2_amba_pkg.sv
@@ -15,8 +15,8 @@
 // 
 package l2_amba_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 
 localparam bit [1:0] idle = 2'h0;

diff --git a/sv/rtl/riverlib/l2cache/l2_dst.sv b/sv/rtl/riverlib/l2cache/l2_dst.sv
@@ -38,8 +38,8 @@ module L2Destination #(
     output logic [river_cfg_pkg::L1CACHE_BYTES_PER_LINE-1:0] o_req_wstrb
 );
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import l2_dst_pkg::*;
 

diff --git a/sv/rtl/riverlib/l2cache/l2_dst_pkg.sv b/sv/rtl/riverlib/l2cache/l2_dst_pkg.sv
@@ -15,8 +15,8 @@
 // 
 package l2_dst_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 
 localparam bit [2:0] Idle = 3'h0;

diff --git a/sv/rtl/riverlib/l2cache/l2serdes.sv b/sv/rtl/riverlib/l2cache/l2serdes.sv
@@ -28,8 +28,8 @@ module L2SerDes #(
     output types_amba_pkg::axi4_master_out_type o_msto
 );
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import l2serdes_pkg::*;
 

diff --git a/sv/rtl/riverlib/l2cache/l2serdes_pkg.sv b/sv/rtl/riverlib/l2cache/l2serdes_pkg.sv
@@ -15,8 +15,8 @@
 // 
 package l2serdes_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 
 localparam int linew = L2CACHE_LINE_BITS;

diff --git a/sv/rtl/riverlib/river_amba.sv b/sv/rtl/riverlib/river_amba.sv
@@ -38,8 +38,8 @@ module RiverAmba #(
     input logic [(32 * river_cfg_pkg::CFG_PROGBUF_REG_TOTAL)-1:0] i_progbuf// progam buffer
 );
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import target_cfg_pkg::*;
 import river_amba_pkg::*;

diff --git a/sv/rtl/riverlib/river_amba_pkg.sv b/sv/rtl/riverlib/river_amba_pkg.sv
@@ -15,8 +15,8 @@
 // 
 package river_amba_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import target_cfg_pkg::*;
 

diff --git a/sv/rtl/riverlib/types_river_pkg.sv b/sv/rtl/riverlib/types_river_pkg.sv
@@ -15,8 +15,8 @@
 // 
 package types_river_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
+import river_cfg_pkg::*;
 
 
 

diff --git a/sv/rtl/riverlib/workgroup.sv b/sv/rtl/riverlib/workgroup.sv
@@ -50,9 +50,9 @@ module Workgroup #(
     output logic o_dmreset                                  // reset everything except DMI debug interface
 );
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
 import types_pnp_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import target_cfg_pkg::*;
 import workgroup_pkg::*;

diff --git a/sv/rtl/riverlib/workgroup_pkg.sv b/sv/rtl/riverlib/workgroup_pkg.sv
@@ -15,9 +15,9 @@
 // 
 package workgroup_pkg;
 
-import river_cfg_pkg::*;
 import types_amba_pkg::*;
 import types_pnp_pkg::*;
+import river_cfg_pkg::*;
 import types_river_pkg::*;
 import target_cfg_pkg::*;