Skip to content

improve RISC-V multi core boot #405

improve RISC-V multi core boot

improve RISC-V multi core boot #405

Triggered via pull request February 15, 2024 10:11
Status Success
Total duration 12m 48s
Artifacts

sel4test-sim.yml

on: pull_request
Matrix: Simulation
Fit to window
Zoom out
Zoom in