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Fix the bugs in RLP/Tx/PI circuit which are reported by Zellic & KALOS auditors #572

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Aug 16, 2023
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8de5a6d
fix finding 3 (#575)
kunxian-xia Jun 29, 2023
014bdd3
Fix zellic finding 4 (#576)
kunxian-xia Jul 6, 2023
cea4a87
add range check on diffs (#586)
kunxian-xia Jul 6, 2023
37b273d
Fix finding 10 (#578)
kunxian-xia Jul 6, 2023
a4d784b
Fix finding 13 (#579)
kunxian-xia Jul 6, 2023
c48b94a
Fix zellic finding 14 (#580)
kunxian-xia Jul 6, 2023
6ee948c
Merge branch 'develop' into fix/rlp-audit-wave1
kunxian-xia Jul 6, 2023
1243ef4
Fix zellic finding 5 (#584)
kunxian-xia Jul 6, 2023
3fd8977
Fix finding 17 (#602)
kunxian-xia Jul 13, 2023
3426d30
Merge branch 'develop' into fix/rlp-audit-wave1
kunxian-xia Jul 13, 2023
baa4a7b
add more diff range check
kunxian-xia Jul 13, 2023
9934b8e
Merge branch 'develop' into fix/rlp-audit-wave1
kunxian-xia Jul 17, 2023
1586943
fix finding 7 (#625)
kunxian-xia Jul 26, 2023
e22aba5
tx_id = 1 when sm starts
kunxian-xia Jul 26, 2023
1c3e106
Merge branch 'develop' into fix/rlp-audit-wave1
kunxian-xia Jul 26, 2023
203043a
Merge branch 'develop' into fix/rlp-audit-wave1
kunxian-xia Jul 27, 2023
2ad2e75
Fix finding 11 : use length for rlc in rlp table (#719)
kunxian-xia Aug 16, 2023
9767879
refactor bytes_rlc type
kunxian-xia Aug 16, 2023
29f0ffb
Merge branch 'develop' into fix/rlp-audit-wave
kunxian-xia Aug 16, 2023
7cdca82
Fix the bugs in Tx & PI circuits reported by Zellic & KALOS auditors …
kunxian-xia Aug 16, 2023
57a0ae0
Merge remote-tracking branch 'scroll/develop' into fix/rlp-audit-wave1
kunxian-xia Aug 16, 2023
622039c
use q_first instead
kunxian-xia Aug 16, 2023
b192508
fmt
kunxian-xia Aug 16, 2023
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5 changes: 5 additions & 0 deletions eth-types/src/geth_types.rs
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,11 @@ impl TxType {
matches!(*self, TxType::L1Msg)
}

/// If this type is Eip155 or not
pub fn is_eip155_tx(&self) -> bool {
matches!(*self, TxType::Eip155)
}

/// Get the type of transaction
pub fn get_tx_type(tx: &crate::Transaction) -> Self {
match tx.transaction_type {
Expand Down
23 changes: 11 additions & 12 deletions zkevm-circuits/src/pi_circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1379,6 +1379,11 @@ impl<F: Field> PiCircuitConfig<F> {
Coinbase, Timestamp, Number, Difficulty, GasLimit, BaseFee, ChainId, NumTxs,
CumNumTxs, NumAllTxs,
];

// index_cells of same block are equal to block_number.
let mut index_cells = vec![];
let mut block_number_cell = None;

let mut cum_num_txs_field = F::from(cum_num_txs as u64);
cum_num_txs += num_txs;
for (row, tag) in block_ctx
Expand All @@ -1392,9 +1397,6 @@ impl<F: Field> PiCircuitConfig<F> {
offset,
|| row[0],
)?;
// index_cells of same block are equal to block_number.
let mut index_cells = vec![];
let mut block_number_cell = None;
for (column, value) in block_table_columns.iter().zip_eq(&row[1..]) {
let cell = region.assign_advice(
|| format!("block table row {offset}"),
Expand All @@ -1412,15 +1414,6 @@ impl<F: Field> PiCircuitConfig<F> {
block_value_cells.push(cell);
}
}
for i in 0..(index_cells.len() - 1) {
region.constrain_equal(index_cells[i].cell(), index_cells[i + 1].cell())?;
}
if *tag == Number {
region.constrain_equal(
block_number_cell.unwrap().cell(),
index_cells[0].cell(),
)?;
}

region.assign_fixed(
|| "is_block_num_txs",
Expand Down Expand Up @@ -1460,6 +1453,12 @@ impl<F: Field> PiCircuitConfig<F> {
}
offset += 1;
}
// block_num == index[0]
region.constrain_equal(block_number_cell.unwrap().cell(), index_cells[0].cell())?;
// index[i] == index[i+1]
for i in 0..(index_cells.len() - 1) {
region.constrain_equal(index_cells[i].cell(), index_cells[i + 1].cell())?;
}
}

Ok(block_value_cells)
Expand Down
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