Merge branch 'dev' into tem1

riscv-non-isa · Nov 4, 2024 · 7578b3d · 7578b3d
2 parents a154e03 + 3843c73
commit 7578b3d
Showing 1 changed file with 0 additions and 7 deletions.
diff --git a/riscv-test-suite/env/test_macros.h b/riscv-test-suite/env/test_macros.h
@@ -888,13 +888,6 @@ ADDI(swreg, swreg, RVMODEL_CBZ_BLOCKSIZE)
       inst destreg, reg1, reg2, imm		;\
     )
 
-//Tests for a instructions with register-register operand
-#define TEST_RI_OP(inst, destreg, reg1, reg2, imm, correctval, val1, val2, swreg, offset, testreg) \
-    TEST_CASE(testreg, destreg, correctval, swreg, offset, \
-      LI(reg1, MASK_XLEN(val1))			;\
-      LI(reg2, MASK_XLEN(val2))			;\
-      inst destreg, reg1, reg2, imm		;\
-    )
 
 //Tests for a instructions with register-register operand
 #define TEST_RR_OP(inst, destreg, reg1, reg2, correctval, val1, val2, swreg, offset, testreg) \