[TableGen] Fix ordering of register classes. #67245
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arsenm
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Local branch amd-gfx f801801 Merged main:534c096ec9a6 into amd-gfx:c21ceacdbde5 Remote branch main 6fbbcb4 [TableGen] Fix ordering of register classes. (llvm#67245)
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This commit:
TableGen: Try to fix expensive checks failures
d2a9b87
fixed one of the sort() calls, but there's another.
Caught on expensive-checks buildbots that started to fail sporadically after submitting
[AMDGPU] Add True16 register classes.
469b3bf