AArch64: Clear hasSideEffects on AUT and AUTPAC. #141330
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Created using spr 1.3.6-beta.1
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@llvm/pr-subscribers-backend-aarch64 Author: Peter Collingbourne (pcc) ChangesWith hasSideEffects=1 we unnecessarily inhibit certain optimizations in Full diff: https://github.com/llvm/llvm-project/pull/141330.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 61055a66e8858..5674721be90c4 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -1943,7 +1943,7 @@ let Predicates = [HasPAuth] in {
def AUT : Pseudo<(outs), (ins i32imm:$Key, i64imm:$Disc, GPR64noip:$AddrDisc),
[]>, Sched<[WriteI, ReadI]> {
let isCodeGenOnly = 1;
- let hasSideEffects = 1;
+ let hasSideEffects = 0;
let mayStore = 0;
let mayLoad = 0;
let Size = 32;
@@ -1960,7 +1960,7 @@ let Predicates = [HasPAuth] in {
i32imm:$PACKey, i64imm:$PACDisc, GPR64noip:$PACAddrDisc),
[]>, Sched<[WriteI, ReadI]> {
let isCodeGenOnly = 1;
- let hasSideEffects = 1;
+ let hasSideEffects = 0;
let mayStore = 0;
let mayLoad = 0;
let Size = 48;
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I feel I would expect these instructions to have side-effects, especially with FPAC. Can you give more details about what kind of optimization this enables and why it is safe? I guess you mean that we do not expect the exception to occur, and if it does it does not matter where it happens, only that it does? |
The kinds of optimizations that I was seeing was things like merging LDR/LDR into LDP if it happened to cross the AUT boundary. I'll see if I can show you an example tomorrow. In general we only need this exception to happen in case of a use (and it needs to happen before the use by construction) and as you mention it doesn't really matter when it happens relative to the other instructions. This (exception only guaranteed if used) is already the case at the IR level (IntrNoMem allows the intrinsic to be dropped without a use), this just extends the same idea to the backend. |
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Here is an example extracted from fleetbench. With my PFP patch series and hasSideEffects=0 on AUTxMxN: The same but with hasSideEffects=1 on AUTxMxN: |
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With hasSideEffects=1 we unnecessarily inhibit certain optimizations in
the backend such as code motion which lead to slightly less efficient
codegen when the pseudo instructions are used frequently, e.g. in the
PFP use case. These annotations do not cause the instructions to be kept
without a use because the underlying intrinsics are IntrNoMem. Users
should be expected to use another means of keeping the use alive if they
need the trapping side effect without a use (e.g. llvm.fake.use).