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[mlir][vector] Linearization: push 'bit width' logic out of patterns #136581

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clang-format
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newling committed Apr 22, 2025
commit 5d213711a3bd83e35f527f60ea82ec18572b9a1b
2 changes: 1 addition & 1 deletion mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -945,7 +945,7 @@ struct TestVectorBitWidthLinearize final
ConversionTarget target(*context);

populateWithBitWidthConstraints(typeConverter, target,
targetVectorBitwidth);
targetVectorBitwidth);

vector::populateVectorLinearizeBasePatterns(typeConverter, target,
patterns);
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